~ruther/verilog-riscv-semestral-project

ref: adfdc041e204e13c59c32d866fb2ee288b272c57 verilog-riscv-semestral-project/programs/link.ld -rwxr-xr-x 291 bytes
30a7f949 — Rutherther 2 years ago
feat: add basic testing programs