~ruther/verilog-riscv-semestral-project: programs/ma.c 914e69e6c0df1f4e3f33718891c838e42fe535b1

~ruther/verilog-riscv-semestral-project

ref: 914e69e6c0df1f4e3f33718891c838e42fe535b1 verilog-riscv-semestral-project/programs/ma.c -rw-r--r-- 282 bytes

fb02ebb2 — Rutherther 1 year, 4 months ago

Merge pull request #2 from Rutherther/feat/misaligned-reads

Support misaligned read

e5d2c0c5 — Rutherther 1 year, 4 months ago

tests: add simple ma.c program for testing misaligned access