~ruther/verilog-riscv-semestral-project: .gitignore 8adc02d7500da4fde40fb0b52d3078ab419e4e8f

~ruther/verilog-riscv-semestral-project

ref: 8adc02d7500da4fde40fb0b52d3078ab419e4e8f verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 37 bytes

9c81ece2 — Rutherther 2 years ago

chore: add gitignore