~ruther/verilog-riscv-semestral-project

ref: 89310129c1470fe2c2cdd10d9b6c88d5eab747cc verilog-riscv-semestral-project/tests/custom d---------
a079c57b — Rutherther 3 years ago
tests: add more custom tests
308a1462 — Rutherther 3 years ago
tests: add register dump, printing
51842d38 — Rutherther 3 years ago
feat: add support for official tests