~ruther/verilog-riscv-semestral-project: .gitignore 51a684d98d8d4e7e256565e1ad0ec13a72116fd8

~ruther/verilog-riscv-semestral-project

ref: 51a684d98d8d4e7e256565e1ad0ec13a72116fd8 verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 37 bytes

9c81ece2 — Rutherther 1 year, 6 months ago

chore: add gitignore