~ruther/verilog-riscv-semestral-project

ref: 18eeb2c56b849ad7bffa04c2e212619237449216 verilog-riscv-semestral-project/programs/gcd.c -rwxr-xr-x 790 bytes
bde9255c — Rutherther 2 years ago
chore: load gcd parameters from memory
11422de0 — Rutherther 2 years ago
feat: store c results in memory addr 0
bb32d2dd — Rutherther 2 years ago
feat: add gcd program for testing