~ruther/verilog-riscv-semestral-project

ref: 0d5d1a1fc04a21df2c7cf81ce969e9c02c125901 verilog-riscv-semestral-project/programs/ma.c -rw-r--r-- 282 bytes
Merge pull request #2 from Rutherther/feat/misaligned-reads

Support misaligned read
tests: add simple ma.c program for testing misaligned access
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