~ruther/vhdl-makefile-template

7df98a696e44c196dc4bd64ad709a8ad75033e05 — František Boháček 3 years ago
feat: add basic template

Template for vhdl application that can be simulated using ghdl.
In xil folder, makefile for Xilinx toolchain can be found (from synthesis to upload to the device)
7 files changed, 122 insertions(+), 0 deletions(-)

A .gitignore
A Makefile
A src/.gitkeep
A testbench/.gitkeep
A xil/.gitignore
A xil/Makefile
A xil/impact.cmd.tmplt
A  => .gitignore +2 -0
@@ 1,2 @@
_impactbatch.log
work/
\ No newline at end of file

A  => Makefile +65 -0
@@ 1,65 @@
export ROOT := $(shell pwd)
SIMDIR := $(ROOT)/sim
export SRCDIR := $(ROOT)/src
TBDIR := $(ROOT)/testbench
WORKDIR := $(ROOT)/work

#####################################################
#                                                   #
#                 Top level entity                  #
#                                                   #
#####################################################
export TOP_ENTITY := # fill
export TOP_ENTITY_VHDL := $(SRCDIR)/$(TOP_ENTITY).$(VHDLEX)
TESTBENCH ?= $(TOP_ENTITY)_tb # default

WAVEFORM_VIEWER := gtkwave

COMPILER := ghdl
COMPILER_FLAGS := --workdir=$(WORKDIR)
VHDLEX := vhd

STOP_TIME ?= 1000ns
WAVEFORM_FILE ?= $(SIMDIR)/out.gwh

RUN_FLAGS := --stop-time=$(STOP_TIME) --vcd=$(WAVEFORM_FILE) --stats

TBSOURCES := $(wildcard $(TBDIR)/*.$(VHDLEX))
export SOURCES := $(wildcard $(SRCDIR)/*.$(VHDLEX))
ALL_SOURCES := $(SOURCES) $(TBSOURCES)

EXECUTABLE := $(SIMDIR)/$(TESTBENCH)

.PHONY: all clean ax309

compile: $(WORKDIR) $(ALL_SOURCES)
	@$(COMPILER) -i $(COMPILER_FLAGS) $(ALL_SOURCES)
	@$(COMPILER) -m -o $(EXECUTABLE) $(COMPILER_FLAGS) $(TESTBENCH)

all: compile run view

$(TBDIR)/$(TESTBENCH): compile

$(WORKDIR):
	@mkdir $(WORKDIR)

$(SIMDIR):
	@mkdir $(SIMDIR)

run: $(TBDIR)/$(TESTBENCH) $(SIMDIR)
	@$(EXECUTABLE) $(RUN_FLAGS)

view:
	@$(WAVEFORM_VIEWER) $(WAVEFORM_FILE)

ax309:
	@$(MAKE) -C ax309 all

ax309-flash:
	@$(MAKE) -C ax309 flash

clean:
	@$(RM) -rf $(SIMDIR)
	@$(RM) -rf $(WORKDIR)
	@$(MAKE) -C ax309 clean


A  => src/.gitkeep +0 -0
A  => testbench/.gitkeep +0 -0
A  => xil/.gitignore +3 -0
@@ 1,3 @@
impact.cmd
filelist.txt
work/

A  => xil/Makefile +45 -0
@@ 1,45 @@
DEVICE := xc6slx9
PACKAGE := 2ftg256

WORKDIR := ./work

IMPACT := impact
XFLOW := xflow

# SOURCES is expected to be set to list of files separated by space
# TOP_ENTITY is expected to be set to top entity's name
# TOP_ENTITY_VHDL is expected to be set to top entity's vhdl file path

TOP_ENTITY_BIT := $(WORKDIR)/$(TOP_ENTITY).bit
TOP_ENTITY_BIT_ESCAPED := $(shell echo $(TOP_ENTITY_BIT) | sed "s=\/=\\\/=g")

IMPACT_BATCH := impact.cmd
IMPACT_BATCH_TEMPLATE := impact.cmd.tmplt

SOURCES_LIST := filelist.txt

.PHONY: all compile flash clean

all: compile flash

$(WORKDIR):
	mkdir $(WORKDIR)

$(SOURCES_LIST):
	echo $(SOURCES) | tr " " "\n" > $(SOURCES_LIST)

compile: clean $(WORKDIR) $(SOURCES_LIST)
	cp $(SRCDIR)/*.ucf $(WORKDIR)
	$(XFLOW) -p $(DEVICE)-$(PACKAGE) -g srclist:$(SOURCES_LIST) -synth xst_vhdl.opt -implement balanced.opt -config bitgen.opt $(TOP_ENTITY_VHDL) -wd work

$(IMPACT_BATCH):
	sed -e "s=<bitfile>=$(TOP_ENTITY_BIT_ESCAPED)=g" $(IMPACT_BATCH_TEMPLATE) > $(IMPACT_BATCH)

flash: $(IMPACT_BATCH)
	$(IMPACT) -batch $(IMPACT_BATCH)

clean:
	$(RM) -rf $(WORKDIR)
	$(RM) -rf $(SOURCES_LIST)
	$(RM) -rf $(IMPACT_BATCH)
	$(RM) -rf _impactbatch.log

A  => xil/impact.cmd.tmplt +7 -0
@@ 1,7 @@
setMode -bscan
setcable -p auto
identify

assignFile -p 1 -file <bitfile>
program -p 1
quit

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