~ruther/verilog-riscv-semestral-project (main): .gitignore

~ruther/verilog-riscv-semestral-project

verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 110 bytes

79c7be5c — Rutherther chore: remove unnecessary executable flags 1 year, 3 months ago

.DS_Store
.idea
*.log
tmp/

.direnv/
obj_dir/
*.vcd

out/

waves/
programs/bin/
*.o
*.bin
*.dat

__pycache__/