~ruther/verilog-riscv-semestral-project

ref: feat/misaligned-reads verilog-riscv-semestral-project/tests/official/env/p/link.ld -rwxr-xr-x 33 bytes
89e944c0 — Rutherther fix: sign extend only when misaligned access 1 year, 5 months ago 
                                                                                
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{
  .text.init = 0x0;
}
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