~ruther/verilog-riscv-semestral-project

ref: f8e4e3ed2dc54033786b23aa41cd88ba92eb83e2 verilog-riscv-semestral-project/tests d---------
f8e4e3ed — Rutherther Merge pull request #1 from Rutherther/feat/pipeline 1 year, 5 months ago
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README.md
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comp_list.lst
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custom/
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official/
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run.py
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test_types.py
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