~ruther/verilog-riscv-semestral-project (f8e4e3ed2dc54033786b23aa41cd88ba92eb83e2): .gitmodules

~ruther/verilog-riscv-semestral-project

ref: f8e4e3ed2dc54033786b23aa41cd88ba92eb83e2 verilog-riscv-semestral-project/.gitmodules -rwxr-xr-x 137 bytes

f8e4e3ed — Rutherther Merge pull request #1 from Rutherther/feat/pipeline 1 year, 4 months ago

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[submodule "tests/official/riscv-tests"]
	path = tests/official/riscv-tests
	url = https://github.com/riscv-software-src/riscv-tests.git