~ruther/verilog-riscv-semestral-project (e7b5d989532b0690f2b0ef3a1b7a0072903c0d51): programs/tests.c

~ruther/verilog-riscv-semestral-project

ref: e7b5d989532b0690f2b0ef3a1b7a0072903c0d51 verilog-riscv-semestral-project/programs/tests.c -rwxr-xr-x 132 bytes

e7b5d989 — Rutherther test: add cpu testbenches for c programs 1 year, 5 months ago

void main()
{
	signed char a = -10;
	signed char b = a << 1;
	unsigned char c = ((unsigned char)b) >> 1;
	signed char d = b >> 1;
}