~ruther/verilog-riscv-semestral-project

ref: e7b5d989532b0690f2b0ef3a1b7a0072903c0d51 verilog-riscv-semestral-project/programs/start.S -rwxr-xr-x 84 bytes
e7b5d989 — Rutherther test: add cpu testbenches for c programs 1 year, 5 months ago 
                                                                                
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.global _start

.text
_start:
    addi sp, x0, 127
    call main
_loop:
    j _loop
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