~ruther/verilog-riscv-semestral-project

ref: db85fb354b873f3ab5e5e936b4412a7d828f0ca7 verilog-riscv-semestral-project/programs/add.c -rwxr-xr-x 171 bytes
db85fb35 — Rutherther tests: fix ram and control_unit tests to match newest architecture 2 years ago 
                                                                                
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int add(int a, int b)
{
    return a + b;
}

void main()
{
    int a = 20;
    int b = 30;
    int c = add(a, b);

    int* result_address = 0;
    *result_address = c;
}