~ruther/verilog-riscv-semestral-project (b0f8702877121832dfdee7d921af417237673284): .gitmodules

~ruther/verilog-riscv-semestral-project

ref: b0f8702877121832dfdee7d921af417237673284 verilog-riscv-semestral-project/.gitmodules -rwxr-xr-x 137 bytes

b0f87028 — Rutherther docs: add basic documentation 1 year, 5 months ago

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[submodule "tests/official/riscv-tests"]
	path = tests/official/riscv-tests
	url = https://github.com/riscv-software-src/riscv-tests.git