~ruther/verilog-riscv-semestral-project (a079c57bf9f1ab9cca6147599107bdd01e034121): programs/tests.c

~ruther/verilog-riscv-semestral-project

ref: a079c57bf9f1ab9cca6147599107bdd01e034121 verilog-riscv-semestral-project/programs/tests.c -rwxr-xr-x 132 bytes

a079c57b — Rutherther tests: add more custom tests 1 year, 5 months ago

void main()
{
	signed char a = -10;
	signed char b = a << 1;
	unsigned char c = ((unsigned char)b) >> 1;
	signed char d = b >> 1;
}