~ruther/verilog-riscv-semestral-project

ref: a079c57bf9f1ab9cca6147599107bdd01e034121 verilog-riscv-semestral-project/programs/operations.c -rwxr-xr-x 345 bytes
a079c57b — Rutherther tests: add more custom tests 1 year, 5 months ago
                                                                                
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
int main()
{
    int *load_address = 0;
    int *result_address = 0;

    int a = *load_address;
    int b = *(load_address + 1);

    *(result_address + 0) = a + b;
    *(result_address + 1) = a - b;
    *(result_address + 2) = a > b;
    *(result_address + 3) = a < b;
    *(result_address + 4) = a << b;
    *(result_address + 5) = a >> b;
}
Do not follow this link