~ruther/verilog-riscv-semestral-project (6da6eb9e4ee2ac5f96d5bed40c4c46d57a64c79f): .gitmodules

~ruther/verilog-riscv-semestral-project

ref: 6da6eb9e4ee2ac5f96d5bed40c4c46d57a64c79f verilog-riscv-semestral-project/.gitmodules -rwxr-xr-x 137 bytes

6da6eb9e — Rutherther docs: better document the stage code, organize it better 1 year, 4 months ago

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[submodule "tests/official/riscv-tests"]
	path = tests/official/riscv-tests
	url = https://github.com/riscv-software-src/riscv-tests.git