~ruther/verilog-riscv-semestral-project

ref: 681756b70c4accd8c4caec6e97d8275a6359e5f9 verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 110 bytes
681756b7 — Rutherther chore: recover singlecycle version 2 years ago 
                                                                                
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.DS_Store
.idea
*.log
tmp/

.direnv/
obj_dir/
*.vcd

out/

waves/
programs/bin/
*.o
*.bin
*.dat

__pycache__/