~ruther/verilog-riscv-semestral-project

ref: 66d141635b81de276634d3d9f97fe46c0ffb2f32 verilog-riscv-semestral-project/tests/official/env/p/link.ld -rwxr-xr-x 33 bytes
66d14163 — Rutherther feat: move jumping to execute stage 2 years ago 
                                                                                
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SECTIONS
{
  .text.init = 0x0;
}