~ruther/verilog-riscv-semestral-project

ref: 60517957c80d84b8a6514adc0dd416634e9a88e6 verilog-riscv-semestral-project/src/file_program_memory.sv -rwxr-xr-x 319 bytes
60517957 — Rutherther chore: update environment description 2 years ago 
                                                                                
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

module file_program_memory
(
  input [WIDTH - 1:0] addr,
  output [31:0] instruction
);
  parameter string FILE_NAME;
  parameter WIDTH = 20;
  parameter MEM_SIZE = 1 << (WIDTH - 2) - 1;

  reg [31:0] imem[0:MEM_SIZE];

  initial $readmemh(FILE_NAME, imem);

  assign instruction = imem[addr[WIDTH - 1:2]];

endmodule;