~ruther/verilog-riscv-semestral-project (60517957c80d84b8a6514adc0dd416634e9a88e6): .gitignore

~ruther/verilog-riscv-semestral-project

ref: 60517957c80d84b8a6514adc0dd416634e9a88e6 verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 110 bytes

60517957 — Rutherther chore: update environment description 1 year, 5 months ago

.DS_Store
.idea
*.log
tmp/

.direnv/
obj_dir/
*.vcd

out/

waves/
programs/bin/
*.o
*.bin
*.dat

__pycache__/