~ruther/verilog-riscv-semestral-project (51842d387ac593fdcad90d2ed22e258a1c6780ee): programs/tests.c

~ruther/verilog-riscv-semestral-project

ref: 51842d387ac593fdcad90d2ed22e258a1c6780ee verilog-riscv-semestral-project/programs/tests.c -rwxr-xr-x 132 bytes

51842d38 — Rutherther feat: add support for official tests 1 year, 5 months ago

void main()
{
	signed char a = -10;
	signed char b = a << 1;
	unsigned char c = ((unsigned char)b) >> 1;
	signed char d = b >> 1;
}