~ruther/verilog-riscv-semestral-project (181e94c4c368df49b63ee435f623436482f2f6a2): programs/tests.c

~ruther/verilog-riscv-semestral-project

ref: 181e94c4c368df49b63ee435f623436482f2f6a2 verilog-riscv-semestral-project/programs/tests.c -rwxr-xr-x 132 bytes

181e94c4 — Rutherther chore: add risc toolchain to flake 1 year, 7 months ago

void main()
{
	signed char a = -10;
	signed char b = a << 1;
	unsigned char c = ((unsigned char)b) >> 1;
	signed char d = b >> 1;
}