~ruther/verilog-riscv-semestral-project (0d5d1a1fc04a21df2c7cf81ce969e9c02c125901): .gitmodules

~ruther/verilog-riscv-semestral-project

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0d5d1a1f — Rutherther fix: sign extend only when misaligned access 1 year, 3 months ago

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[submodule "tests/official/riscv-tests"]
	path = tests/official/riscv-tests
	url = https://github.com/riscv-software-src/riscv-tests.git