~ruther/verilog-riscv-semestral-project: tests/official/env/p af6386a7cb0eb3b58cd754956dca300d416cbcde

~ruther/verilog-riscv-semestral-project

ref: af6386a7cb0eb3b58cd754956dca300d416cbcde verilog-riscv-semestral-project/tests/official/env/p d---------

308a1462 — Rutherther 2 years ago

tests: add register dump, printing

51842d38 — Rutherther 2 years ago

feat: add support for official tests