~ruther/verilog-riscv-semestral-project: tests/official/env/p aeab403896e168bc0c44a65883d46bb96689b7fb

~ruther/verilog-riscv-semestral-project

ref: aeab403896e168bc0c44a65883d46bb96689b7fb verilog-riscv-semestral-project/tests/official/env/p d---------

308a1462 — Rutherther 2 years ago

tests: add register dump, printing

51842d38 — Rutherther 2 years ago

feat: add support for official tests