~ruther/verilog-riscv-semestral-project: tests/test_types.py 79c7be5c1c8ae2aea07f48d32abca650d24e8045

~ruther/verilog-riscv-semestral-project

ref: 79c7be5c1c8ae2aea07f48d32abca650d24e8045 verilog-riscv-semestral-project/tests/test_types.py -rw-r--r-- 928 bytes

79c7be5c — Rutherther 1 year, 3 months ago main

chore: remove unnecessary executable flags

Closes #4.

308a1462 — Rutherther 1 year, 5 months ago

tests: add register dump, printing

51842d38 — Rutherther 1 year, 5 months ago

feat: add support for official tests