~ruther/verilog-riscv-semestral-project

ref: 740085c87e5cdab5e4d96e696df87f4a30e6f09f verilog-riscv-semestral-project/programs/gcd.c -rwxr-xr-x 790 bytes
chore: load gcd parameters from memory
feat: store c results in memory addr 0
feat: add gcd program for testing
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