# Patches for the PLL Clock Generator
#
# - Make the Lock Detector field read-only
# - Add descriptions for "Input Multiplexer" and "USB Postscaler"
# - Remove and re-add the "Lock Frequency" and Postscaler fields
#   to fix <https://github.com/Rahix/atdf2svd/issues/1>.
PLL:
  PLLCSR:
    _modify:
      PLOCK:
        access: read-only
  PLLFRQ:
    _delete:
      - PDIV
      - PLLTM
    _modify:
      PINMUX:
        description: "PLL Input Multiplexer"
      PLLUSB:
        description: "PLL Postscaler for USB Peripheral"
    _add:
      PDIV:
        description: "PLL Lock Frequency"
        bitRange: "[3:0]"
      PLLTM:
        description: "PLL Postscaler for High Speed Timer"
        bitRange: "[5:4]"
    PDIV:
      MHZ40: [0b0011, "40 MHz"]
      MHZ48: [0b0100, "48 MHz"]
      MHZ56: [0b0101, "56 MHz"]
      MHZ72: [0b0111, "72 MHz"]
      MHZ80: [0b1000, "80 MHz"]
      MHZ88: [0b1001, "88 MHz"]
      MHZ96: [0b1010, "96 MHz"]
    PLLTM:
      DISCONNECTED: [0, "0 (Disconnected)"]
      FACTOR_1:     [1, "1"]
      FACTOR_15:    [2, "1.5"]
      FACTOR_2:     [3, "2"]