TC0:
  TCCR0A:
    _modify:
      COM0A:
        description: "Compare Output A Mode"
        _write_constraint: enum
      COM0B:
        description: "Compare Output B Mode"
        _write_constraint: enum
      WGM0:
        _write_constraint: enum
    COM0A:
      _replace_enum:
        DISCONNECTED:  [0, "Normal port operation, OC0x disconnected"]
        MATCH_TOGGLE:  [1, "Toggle OC0x on Compare Match (Might depend on WGM)"]
        MATCH_CLEAR:   [2, "Clear OC0x on Compare Match (If PWM is enabled, OC0x is set at TOP)"]
        MATCH_SET:     [3, "Set OC0x on Compare Match (If PWM is enabled, OC0x is cleared at TOP)"]
    COM0B:
      _replace_enum:
        DISCONNECTED:  [0, "Normal port operation, OC0x disconnected"]
        MATCH_TOGGLE:  [1, "Toggle OC0x on Compare Match (Might depend on WGM)"]
        MATCH_CLEAR:   [2, "Clear OC0x on Compare Match (If PWM is enabled, OC0x is set at TOP)"]
        MATCH_SET:     [3, "Set OC0x on Compare Match (If PWM is enabled, OC0x is cleared at TOP)"]
    WGM0:
      _replace_enum:
        NORMAL_TOP:    [0, "Normal, Top: `0xff`, Update: *Immediate*, Flag: *MAX*"]
        PWM_PHASE:     [1, "Phase Correct PWM, Top: `0xff`, Update: *TOP*, Flag: *BOTTOM*"]
        CTC:           [2, "CTC, Top: *OCRA*, Update: *Immediate*, Flag: *MAX*"]
        PWM_FAST:      [3, "Fast PWM, Top: `0xff`, Update: *TOP*, Flag: *MAX*"]
  TCCR0B:
    _modify:
      WGM02:
        description: "Waveform Generation Mode High Bit (Enable Top: *OCRA* for `PWM` modes)"
      FOC0*:
        access: write-only
    CS0:
      _replace_enum:
        NO_CLOCK:      [0, "No clock source (Timer/Counter stopped)"]
        DIRECT:        [1, "Running, No Prescaling"]
        PRESCALE_8:    [2, "Running, CLK/8"]
        PRESCALE_64:   [3, "Running, CLK/64"]
        PRESCALE_256:  [4, "Running, CLK/256"]
        PRESCALE_1024: [5, "Running, CLK/1024"]
        EXT_FALLING:   [6, "Running, ExtClk Tx Falling Edge"]
        EXT_RISING:    [7, "Running, ExtClk Tx Rising Edge"]