From 6a6d53c909b967b17a95078408b222e14065df6c Mon Sep 17 00:00:00 2001 From: Rutherther Date: Tue, 31 Dec 2024 21:04:05 +0100 Subject: [PATCH] feat: add test for max divisor (256) --- hdl_spi/tests/test_spi_masterslave.py | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/hdl_spi/tests/test_spi_masterslave.py b/hdl_spi/tests/test_spi_masterslave.py index 816e959..3b3af39 100644 --- a/hdl_spi/tests/test_spi_masterslave.py +++ b/hdl_spi/tests/test_spi_masterslave.py @@ -427,11 +427,34 @@ async def different_clock(dut): await Timer(100, "ns") +@cocotb.test() +async def different_clock_256(dut): + clk = Clock(dut.clk_i, 5, "ns") + interface = SpiInterface(dut.csn_o, dut.sck_o, dut.miso_i, dut.mosi_o) + config = SpiConfig(8, RisingEdge, FallingEdge, 2550, "ns") + slave = SpiSlave(interface, config) + driver = DutDriver(dut) + + await cocotb.start(clk.start()) + + await init(dut) + dut.div_sel_i.value = 7 # divide by 4 + + await cocotb.start(slave.coroutine()) + await cocotb.start(driver.coroutine()) + + await driver.auto_receive() + + count = 5 + await perform_multiple_transmits(count, dut, slave, driver) + + await Timer(100, "ns") + @cocotb.test() async def inverted_clock(dut): clk = Clock(dut.clk_i, 5, "ns") interface = SpiInterface(dut.csn_o, dut.sck_o, dut.miso_i, dut.mosi_o) - config = SpiConfig(8, RisingEdge, FallingEdge, 20, "ns") + config = SpiConfig(8, RisingEdge, FallingEdge, 10, "ns") slave = SpiSlave(interface, config) driver = DutDriver(dut) -- 2.48.1