From 633b353a6711c01d84cc4b60a66e6cbb92639788 Mon Sep 17 00:00:00 2001 From: Rutherther Date: Sun, 29 Dec 2024 13:38:33 +0100 Subject: [PATCH] fix: masterslave component inputs tx_valid, rx_ready were outs --- hdl_spi/src/spi_masterslave.vhd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hdl_spi/src/spi_masterslave.vhd b/hdl_spi/src/spi_masterslave.vhd index 173c1d6..f613321 100644 --- a/hdl_spi/src/spi_masterslave.vhd +++ b/hdl_spi/src/spi_masterslave.vhd @@ -37,11 +37,11 @@ entity spi_masterslave is rx_en_i : in std_logic; rx_data_o : out std_logic_vector(get_max_natural(SIZES) - 1 downto 0); rx_valid_o : out std_logic; - rx_ready_i : out std_logic; + rx_ready_i : in std_logic; -- Tx tx_en_i : in std_logic; tx_data_i : in std_logic_vector(get_max_natural(SIZES) - 1 downto 0); - tx_valid_i : out std_logic; + tx_valid_i : in std_logic; tx_ready_o : out std_logic; -- State busy_o : out std_logic; -- 2.48.1