From 45799af4a8b1914c3cfd2f8f25df7db0779bee39 Mon Sep 17 00:00:00 2001 From: Rutherther Date: Tue, 31 Dec 2024 21:02:45 +0100 Subject: [PATCH] fix: selected_divisor range --- hdl_spi/src/spi_clkgen.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hdl_spi/src/spi_clkgen.vhd b/hdl_spi/src/spi_clkgen.vhd index 5f93090..88061ba 100644 --- a/hdl_spi/src/spi_clkgen.vhd +++ b/hdl_spi/src/spi_clkgen.vhd @@ -32,7 +32,7 @@ architecture a1 of spi_clkgen is signal curr_running : std_logic; signal next_running : std_logic; - signal selected_divisor : natural range 0 to MAX - 1 := 1; + signal selected_divisor : natural range 0 to MAX := 1; signal changing : std_logic; signal curr_counter : integer range 0 to MAX - 1; -- 2.48.1