{ "design": { "design_info": { "boundary_crc": "0x84EB5272500A95DE", "device": "xc7z020clg400-1", "gen_directory": "../../../../mam_sem_spi.gen/sources_1/bd/toplevel", "name": "toplevel", "rev_ctrl_bd_flag": "RevCtrlBdOff", "synth_flow_mode": "Hierarchical", "tool_version": "2024.1", "validated": "true" }, "design_tree": { "processing_system7_0": "", "axi_interconnect_0": { "xbar": "", "s00_couplers": { "auto_pc": "" }, "m00_couplers": {}, "m01_couplers": {}, "m02_couplers": {}, "m03_couplers": {} }, "proc_sys_reset_0": "", "axi_gpio_0": "", "spi_axi_perpih_0": "", "axi_timer_0": "", "axi_timer_1": "", "xlconcat_0": "" }, "interface_ports": { "DDR": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:ddrx:1.0", "vlnv": "xilinx.com:interface:ddrx_rtl:1.0", "parameters": { "AXI_ARBITRATION_SCHEME": { "value": "TDM", "value_src": "default" }, "BURST_LENGTH": { "value": "8", "value_src": "default" }, "CAN_DEBUG": { "value": "false", "value_src": "default" }, "CAS_LATENCY": { "value": "11", "value_src": "default" }, "CAS_WRITE_LATENCY": { "value": "11", "value_src": "default" }, "CS_ENABLED": { "value": "true", "value_src": "default" }, "DATA_MASK_ENABLED": { "value": "true", "value_src": "default" }, "DATA_WIDTH": { "value": "8", "value_src": "default" }, "MEMORY_TYPE": { "value": "COMPONENTS", "value_src": "default" }, "MEM_ADDR_MAP": { "value": "ROW_COLUMN_BANK", "value_src": "default" }, "SLOT": { "value": "Single", "value_src": "default" }, "TIMEPERIOD_PS": { "value": "1250", "value_src": "default" } }, "port_maps": { "CAS_N": { "physical_name": "DDR_cas_n", "direction": "IO" }, "CKE": { "physical_name": "DDR_cke", "direction": "IO" }, "CK_N": { "physical_name": "DDR_ck_n", "direction": "IO" }, "CK_P": { "physical_name": "DDR_ck_p", "direction": "IO" }, "CS_N": { "physical_name": "DDR_cs_n", "direction": "IO" }, "RESET_N": { "physical_name": "DDR_reset_n", "direction": "IO" }, "ODT": { "physical_name": "DDR_odt", "direction": "IO" }, "RAS_N": { "physical_name": "DDR_ras_n", "direction": "IO" }, "WE_N": { "physical_name": "DDR_we_n", "direction": "IO" }, "BA": { "physical_name": "DDR_ba", "direction": "IO", "left": "2", "right": "0" }, "ADDR": { "physical_name": "DDR_addr", "direction": "IO", "left": "14", "right": "0" }, "DM": { "physical_name": "DDR_dm", "direction": "IO", "left": "3", "right": "0" }, "DQ": { "physical_name": "DDR_dq", "direction": "IO", "left": "31", "right": "0" }, "DQS_N": { "physical_name": "DDR_dqs_n", "direction": "IO", "left": "3", "right": "0" }, "DQS_P": { "physical_name": "DDR_dqs_p", "direction": "IO", "left": "3", "right": "0" } } }, "FIXED_IO": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:display_processing_system7:fixedio:1.0", "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0", "parameters": { "CAN_DEBUG": { "value": "false", "value_src": "default" } }, "port_maps": { "MIO": { "physical_name": "FIXED_IO_mio", "direction": "IO", "left": "53", "right": "0" }, "DDR_VRN": { "physical_name": "FIXED_IO_ddr_vrn", "direction": "IO" }, "DDR_VRP": { "physical_name": "FIXED_IO_ddr_vrp", "direction": "IO" }, "PS_SRSTB": { "physical_name": "FIXED_IO_ps_srstb", "direction": "IO" }, "PS_CLK": { "physical_name": "FIXED_IO_ps_clk", "direction": "IO" }, "PS_PORB": { "physical_name": "FIXED_IO_ps_porb", "direction": "IO" } } }, "arduino_a0_a5": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:gpio:1.0", "vlnv": "xilinx.com:interface:gpio_rtl:1.0", "port_maps": { "TRI_I": { "physical_name": "arduino_a0_a5_tri_i", "direction": "I", "left": "5", "right": "0" }, "TRI_O": { "physical_name": "arduino_a0_a5_tri_o", "direction": "O", "left": "5", "right": "0" }, "TRI_T": { "physical_name": "arduino_a0_a5_tri_t", "direction": "O", "left": "5", "right": "0" } } } }, "ports": { "mosi_o_0": { "direction": "O" }, "sck_i_0": { "direction": "I" }, "csn_i_0": { "direction": "I" }, "miso_i_0": { "direction": "I" }, "sck_t_0": { "direction": "O" }, "csn_t_0": { "direction": "O" }, "miso_t_0": { "direction": "O" }, "mosi_t_0": { "direction": "O" }, "sck_o_0": { "direction": "O" }, "csn_o_0": { "direction": "O" }, "miso_o_0": { "direction": "O" }, "mosi_i_0": { "direction": "I" } }, "components": { "processing_system7_0": { "vlnv": "xilinx.com:ip:processing_system7:5.5", "ip_revision": "6", "xci_name": "toplevel_processing_system7_0_0", "xci_path": "ip/toplevel_processing_system7_0_0/toplevel_processing_system7_0_0.xci", "inst_hier_path": "processing_system7_0", "parameters": { "PCW_ACT_APU_PERIPHERAL_FREQMHZ": { "value": "650.000000" }, "PCW_ACT_CAN0_PERIPHERAL_FREQMHZ": { "value": "23.8095" }, "PCW_ACT_CAN1_PERIPHERAL_FREQMHZ": { "value": "23.8095" }, "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": { "value": "10.096154" }, "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": { "value": "125.000000" }, "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": { "value": "100.000000" }, "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_I2C_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": { "value": "200.000000" }, "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": { "value": "200.000000" }, "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": { "value": "50.000000" }, "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": { "value": "200.000000" }, "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_ACT_TTC_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_ACT_UART_PERIPHERAL_FREQMHZ": { "value": "100.000000" }, "PCW_ACT_USB0_PERIPHERAL_FREQMHZ": { "value": "60" }, "PCW_ACT_USB1_PERIPHERAL_FREQMHZ": { "value": "60" }, "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": { "value": "108.333336" }, "PCW_APU_CLK_RATIO_ENABLE": { "value": "6:2:1" }, "PCW_APU_PERIPHERAL_FREQMHZ": { "value": "650" }, "PCW_CAN0_PERIPHERAL_CLKSRC": { "value": "External" }, "PCW_CAN1_PERIPHERAL_CLKSRC": { "value": "External" }, "PCW_CAN_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_CAN_PERIPHERAL_VALID": { "value": "0" }, "PCW_CLK0_FREQ": { "value": "100000000" }, "PCW_CLK1_FREQ": { "value": "10000000" }, "PCW_CLK2_FREQ": { "value": "10000000" }, "PCW_CLK3_FREQ": { "value": "10000000" }, "PCW_CORE0_FIQ_INTR": { "value": "0" }, "PCW_CORE0_IRQ_INTR": { "value": "0" }, "PCW_CORE1_FIQ_INTR": { "value": "0" }, "PCW_CORE1_IRQ_INTR": { "value": "0" }, "PCW_CPU_CPU_6X4X_MAX_RANGE": { "value": "667" }, "PCW_CPU_PERIPHERAL_CLKSRC": { "value": "ARM PLL" }, "PCW_CRYSTAL_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_DCI_PERIPHERAL_CLKSRC": { "value": "DDR PLL" }, "PCW_DCI_PERIPHERAL_FREQMHZ": { "value": "10.159" }, "PCW_DDR_PERIPHERAL_CLKSRC": { "value": "DDR PLL" }, "PCW_DDR_RAM_BASEADDR": { "value": "0x00100000" }, "PCW_DDR_RAM_HIGHADDR": { "value": "0x1FFFFFFF" }, "PCW_DM_WIDTH": { "value": "4" }, "PCW_DQS_WIDTH": { "value": "4" }, "PCW_DQ_WIDTH": { "value": "32" }, "PCW_ENET0_BASEADDR": { "value": "0xE000B000" }, "PCW_ENET0_ENET0_IO": { "value": "MIO 16 .. 27" }, "PCW_ENET0_GRP_MDIO_ENABLE": { "value": "1" }, "PCW_ENET0_GRP_MDIO_IO": { "value": "MIO 52 .. 53" }, "PCW_ENET0_HIGHADDR": { "value": "0xE000BFFF" }, "PCW_ENET0_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_ENET0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_ENET0_PERIPHERAL_FREQMHZ": { "value": "1000 Mbps" }, "PCW_ENET0_RESET_ENABLE": { "value": "1" }, "PCW_ENET0_RESET_IO": { "value": "MIO 9" }, "PCW_ENET1_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_ENET1_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_ENET_RESET_ENABLE": { "value": "1" }, "PCW_ENET_RESET_POLARITY": { "value": "Active Low" }, "PCW_ENET_RESET_SELECT": { "value": "Share reset pin" }, "PCW_EN_4K_TIMER": { "value": "0" }, "PCW_EN_CAN0": { "value": "0" }, "PCW_EN_CAN1": { "value": "0" }, "PCW_EN_CLK0_PORT": { "value": "1" }, "PCW_EN_CLK1_PORT": { "value": "0" }, "PCW_EN_CLK2_PORT": { "value": "0" }, "PCW_EN_CLK3_PORT": { "value": "0" }, "PCW_EN_CLKTRIG0_PORT": { "value": "0" }, "PCW_EN_CLKTRIG1_PORT": { "value": "0" }, "PCW_EN_CLKTRIG2_PORT": { "value": "0" }, "PCW_EN_CLKTRIG3_PORT": { "value": "0" }, "PCW_EN_DDR": { "value": "1" }, "PCW_EN_EMIO_CAN0": { "value": "0" }, "PCW_EN_EMIO_CAN1": { "value": "0" }, "PCW_EN_EMIO_CD_SDIO0": { "value": "0" }, "PCW_EN_EMIO_CD_SDIO1": { "value": "0" }, "PCW_EN_EMIO_ENET0": { "value": "0" }, "PCW_EN_EMIO_ENET1": { "value": "0" }, "PCW_EN_EMIO_GPIO": { "value": "0" }, "PCW_EN_EMIO_I2C0": { "value": "0" }, "PCW_EN_EMIO_I2C1": { "value": "0" }, "PCW_EN_EMIO_MODEM_UART0": { "value": "0" }, "PCW_EN_EMIO_MODEM_UART1": { "value": "0" }, "PCW_EN_EMIO_PJTAG": { "value": "0" }, "PCW_EN_EMIO_SDIO0": { "value": "0" }, "PCW_EN_EMIO_SDIO1": { "value": "0" }, "PCW_EN_EMIO_SPI0": { "value": "0" }, "PCW_EN_EMIO_SPI1": { "value": "0" }, "PCW_EN_EMIO_SRAM_INT": { "value": "0" }, "PCW_EN_EMIO_TRACE": { "value": "0" }, "PCW_EN_EMIO_TTC0": { "value": "0" }, "PCW_EN_EMIO_TTC1": { "value": "0" }, "PCW_EN_EMIO_UART0": { "value": "0" }, "PCW_EN_EMIO_UART1": { "value": "0" }, "PCW_EN_EMIO_WDT": { "value": "0" }, "PCW_EN_EMIO_WP_SDIO0": { "value": "0" }, "PCW_EN_EMIO_WP_SDIO1": { "value": "0" }, "PCW_EN_ENET0": { "value": "1" }, "PCW_EN_ENET1": { "value": "0" }, "PCW_EN_GPIO": { "value": "1" }, "PCW_EN_I2C0": { "value": "0" }, "PCW_EN_I2C1": { "value": "0" }, "PCW_EN_MODEM_UART0": { "value": "0" }, "PCW_EN_MODEM_UART1": { "value": "0" }, "PCW_EN_PJTAG": { "value": "0" }, "PCW_EN_PTP_ENET0": { "value": "0" }, "PCW_EN_PTP_ENET1": { "value": "0" }, "PCW_EN_QSPI": { "value": "1" }, "PCW_EN_RST0_PORT": { "value": "1" }, "PCW_EN_RST1_PORT": { "value": "0" }, "PCW_EN_RST2_PORT": { "value": "0" }, "PCW_EN_RST3_PORT": { "value": "0" }, "PCW_EN_SDIO0": { "value": "1" }, "PCW_EN_SDIO1": { "value": "0" }, "PCW_EN_SMC": { "value": "0" }, "PCW_EN_SPI0": { "value": "0" }, "PCW_EN_SPI1": { "value": "0" }, "PCW_EN_TRACE": { "value": "0" }, "PCW_EN_TTC0": { "value": "0" }, "PCW_EN_TTC1": { "value": "0" }, "PCW_EN_UART0": { "value": "1" }, "PCW_EN_UART1": { "value": "0" }, "PCW_EN_USB0": { "value": "1" }, "PCW_EN_USB1": { "value": "0" }, "PCW_EN_WDT": { "value": "0" }, "PCW_FCLK0_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_FCLK1_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_FCLK2_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_FCLK3_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_FCLK_CLK0_BUF": { "value": "TRUE" }, "PCW_FPGA0_PERIPHERAL_FREQMHZ": { "value": "100" }, "PCW_FPGA1_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_FPGA2_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_FPGA3_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_FPGA_FCLK0_ENABLE": { "value": "1" }, "PCW_GPIO_BASEADDR": { "value": "0xE000A000" }, "PCW_GPIO_EMIO_GPIO_ENABLE": { "value": "0" }, "PCW_GPIO_HIGHADDR": { "value": "0xE000AFFF" }, "PCW_GPIO_MIO_GPIO_ENABLE": { "value": "1" }, "PCW_GPIO_MIO_GPIO_IO": { "value": "MIO" }, "PCW_GPIO_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_I2C_RESET_ENABLE": { "value": "0" }, "PCW_I2C_RESET_POLARITY": { "value": "Active Low" }, "PCW_IMPORT_BOARD_PRESET": { "value": "None" }, "PCW_INCLUDE_ACP_TRANS_CHECK": { "value": "0" }, "PCW_IRQ_F2P_INTR": { "value": "1" }, "PCW_IRQ_F2P_MODE": { "value": "DIRECT" }, "PCW_MIO_0_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_0_PULLUP": { "value": "enabled" }, "PCW_MIO_0_SLEW": { "value": "slow" }, "PCW_MIO_10_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_10_PULLUP": { "value": "enabled" }, "PCW_MIO_10_SLEW": { "value": "slow" }, "PCW_MIO_11_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_11_PULLUP": { "value": "enabled" }, "PCW_MIO_11_SLEW": { "value": "slow" }, "PCW_MIO_12_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_12_PULLUP": { "value": "enabled" }, "PCW_MIO_12_SLEW": { "value": "slow" }, "PCW_MIO_13_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_13_PULLUP": { "value": "enabled" }, "PCW_MIO_13_SLEW": { "value": "slow" }, "PCW_MIO_14_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_14_PULLUP": { "value": "enabled" }, "PCW_MIO_14_SLEW": { "value": "slow" }, "PCW_MIO_15_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_15_PULLUP": { "value": "enabled" }, "PCW_MIO_15_SLEW": { "value": "slow" }, "PCW_MIO_16_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_16_PULLUP": { "value": "enabled" }, "PCW_MIO_16_SLEW": { "value": "slow" }, "PCW_MIO_17_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_17_PULLUP": { "value": "enabled" }, "PCW_MIO_17_SLEW": { "value": "slow" }, "PCW_MIO_18_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_18_PULLUP": { "value": "enabled" }, "PCW_MIO_18_SLEW": { "value": "slow" }, "PCW_MIO_19_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_19_PULLUP": { "value": "enabled" }, "PCW_MIO_19_SLEW": { "value": "slow" }, "PCW_MIO_1_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_1_PULLUP": { "value": "enabled" }, "PCW_MIO_1_SLEW": { "value": "slow" }, "PCW_MIO_20_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_20_PULLUP": { "value": "enabled" }, "PCW_MIO_20_SLEW": { "value": "slow" }, "PCW_MIO_21_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_21_PULLUP": { "value": "enabled" }, "PCW_MIO_21_SLEW": { "value": "slow" }, "PCW_MIO_22_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_22_PULLUP": { "value": "enabled" }, "PCW_MIO_22_SLEW": { "value": "slow" }, "PCW_MIO_23_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_23_PULLUP": { "value": "enabled" }, "PCW_MIO_23_SLEW": { "value": "slow" }, "PCW_MIO_24_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_24_PULLUP": { "value": "enabled" }, "PCW_MIO_24_SLEW": { "value": "slow" }, "PCW_MIO_25_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_25_PULLUP": { "value": "enabled" }, "PCW_MIO_25_SLEW": { "value": "slow" }, "PCW_MIO_26_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_26_PULLUP": { "value": "enabled" }, "PCW_MIO_26_SLEW": { "value": "slow" }, "PCW_MIO_27_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_27_PULLUP": { "value": "enabled" }, "PCW_MIO_27_SLEW": { "value": "slow" }, "PCW_MIO_28_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_28_PULLUP": { "value": "enabled" }, "PCW_MIO_28_SLEW": { "value": "slow" }, "PCW_MIO_29_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_29_PULLUP": { "value": "enabled" }, "PCW_MIO_29_SLEW": { "value": "slow" }, "PCW_MIO_2_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_2_SLEW": { "value": "slow" }, "PCW_MIO_30_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_30_PULLUP": { "value": "enabled" }, "PCW_MIO_30_SLEW": { "value": "slow" }, "PCW_MIO_31_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_31_PULLUP": { "value": "enabled" }, "PCW_MIO_31_SLEW": { "value": "slow" }, "PCW_MIO_32_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_32_PULLUP": { "value": "enabled" }, "PCW_MIO_32_SLEW": { "value": "slow" }, "PCW_MIO_33_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_33_PULLUP": { "value": "enabled" }, "PCW_MIO_33_SLEW": { "value": "slow" }, "PCW_MIO_34_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_34_PULLUP": { "value": "enabled" }, "PCW_MIO_34_SLEW": { "value": "slow" }, "PCW_MIO_35_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_35_PULLUP": { "value": "enabled" }, "PCW_MIO_35_SLEW": { "value": "slow" }, "PCW_MIO_36_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_36_PULLUP": { "value": "enabled" }, "PCW_MIO_36_SLEW": { "value": "slow" }, "PCW_MIO_37_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_37_PULLUP": { "value": "enabled" }, "PCW_MIO_37_SLEW": { "value": "slow" }, "PCW_MIO_38_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_38_PULLUP": { "value": "enabled" }, "PCW_MIO_38_SLEW": { "value": "slow" }, "PCW_MIO_39_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_39_PULLUP": { "value": "enabled" }, "PCW_MIO_39_SLEW": { "value": "slow" }, "PCW_MIO_3_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_3_SLEW": { "value": "slow" }, "PCW_MIO_40_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_40_PULLUP": { "value": "enabled" }, "PCW_MIO_40_SLEW": { "value": "slow" }, "PCW_MIO_41_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_41_PULLUP": { "value": "enabled" }, "PCW_MIO_41_SLEW": { "value": "slow" }, "PCW_MIO_42_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_42_PULLUP": { "value": "enabled" }, "PCW_MIO_42_SLEW": { "value": "slow" }, "PCW_MIO_43_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_43_PULLUP": { "value": "enabled" }, "PCW_MIO_43_SLEW": { "value": "slow" }, "PCW_MIO_44_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_44_PULLUP": { "value": "enabled" }, "PCW_MIO_44_SLEW": { "value": "slow" }, "PCW_MIO_45_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_45_PULLUP": { "value": "enabled" }, "PCW_MIO_45_SLEW": { "value": "slow" }, "PCW_MIO_46_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_46_PULLUP": { "value": "enabled" }, "PCW_MIO_46_SLEW": { "value": "slow" }, "PCW_MIO_47_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_47_PULLUP": { "value": "enabled" }, "PCW_MIO_47_SLEW": { "value": "slow" }, "PCW_MIO_48_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_48_PULLUP": { "value": "enabled" }, "PCW_MIO_48_SLEW": { "value": "slow" }, "PCW_MIO_49_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_49_PULLUP": { "value": "enabled" }, "PCW_MIO_49_SLEW": { "value": "slow" }, "PCW_MIO_4_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_4_SLEW": { "value": "slow" }, "PCW_MIO_50_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_50_PULLUP": { "value": "enabled" }, "PCW_MIO_50_SLEW": { "value": "slow" }, "PCW_MIO_51_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_51_PULLUP": { "value": "enabled" }, "PCW_MIO_51_SLEW": { "value": "slow" }, "PCW_MIO_52_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_52_PULLUP": { "value": "enabled" }, "PCW_MIO_52_SLEW": { "value": "slow" }, "PCW_MIO_53_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_53_PULLUP": { "value": "enabled" }, "PCW_MIO_53_SLEW": { "value": "slow" }, "PCW_MIO_5_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_5_SLEW": { "value": "slow" }, "PCW_MIO_6_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_6_SLEW": { "value": "slow" }, "PCW_MIO_7_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_7_SLEW": { "value": "slow" }, "PCW_MIO_8_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_8_SLEW": { "value": "slow" }, "PCW_MIO_9_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_9_PULLUP": { "value": "enabled" }, "PCW_MIO_9_SLEW": { "value": "slow" }, "PCW_MIO_PRIMITIVE": { "value": "54" }, "PCW_MIO_TREE_PERIPHERALS": { "value": [ "GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#Quad SPI Flash#ENET Reset#GPIO#GPIO#GPIO#GPIO#UART 0#UART 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet", "0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#USB Reset#SD 0#GPIO#GPIO#GPIO#GPIO#Enet 0#Enet 0" ] }, "PCW_MIO_TREE_SIGNALS": { "value": "gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#qspi_fbclk#reset#gpio[10]#gpio[11]#gpio[12]#gpio[13]#rx#tx#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#reset#cd#gpio[48]#gpio[49]#gpio[50]#gpio[51]#mdc#mdio" }, "PCW_M_AXI_GP0_ENABLE_STATIC_REMAP": { "value": "0" }, "PCW_M_AXI_GP0_FREQMHZ": { "value": "10" }, "PCW_M_AXI_GP0_ID_WIDTH": { "value": "12" }, "PCW_M_AXI_GP0_SUPPORT_NARROW_BURST": { "value": "0" }, "PCW_M_AXI_GP0_THREAD_ID_WIDTH": { "value": "12" }, "PCW_NAND_CYCLES_T_AR": { "value": "1" }, "PCW_NAND_CYCLES_T_CLR": { "value": "1" }, "PCW_NAND_CYCLES_T_RC": { "value": "11" }, "PCW_NAND_CYCLES_T_REA": { "value": "1" }, "PCW_NAND_CYCLES_T_RR": { "value": "1" }, "PCW_NAND_CYCLES_T_WC": { "value": "11" }, "PCW_NAND_CYCLES_T_WP": { "value": "1" }, "PCW_NOR_CS0_T_CEOE": { "value": "1" }, "PCW_NOR_CS0_T_PC": { "value": "1" }, "PCW_NOR_CS0_T_RC": { "value": "11" }, "PCW_NOR_CS0_T_TR": { "value": "1" }, "PCW_NOR_CS0_T_WC": { "value": "11" }, "PCW_NOR_CS0_T_WP": { "value": "1" }, "PCW_NOR_CS0_WE_TIME": { "value": "0" }, "PCW_NOR_CS1_T_CEOE": { "value": "1" }, "PCW_NOR_CS1_T_PC": { "value": "1" }, "PCW_NOR_CS1_T_RC": { "value": "11" }, "PCW_NOR_CS1_T_TR": { "value": "1" }, "PCW_NOR_CS1_T_WC": { "value": "11" }, "PCW_NOR_CS1_T_WP": { "value": "1" }, "PCW_NOR_CS1_WE_TIME": { "value": "0" }, "PCW_NOR_SRAM_CS0_T_CEOE": { "value": "1" }, "PCW_NOR_SRAM_CS0_T_PC": { "value": "1" }, "PCW_NOR_SRAM_CS0_T_RC": { "value": "11" }, "PCW_NOR_SRAM_CS0_T_TR": { "value": "1" }, "PCW_NOR_SRAM_CS0_T_WC": { "value": "11" }, "PCW_NOR_SRAM_CS0_T_WP": { "value": "1" }, "PCW_NOR_SRAM_CS0_WE_TIME": { "value": "0" }, "PCW_NOR_SRAM_CS1_T_CEOE": { "value": "1" }, "PCW_NOR_SRAM_CS1_T_PC": { "value": "1" }, "PCW_NOR_SRAM_CS1_T_RC": { "value": "11" }, "PCW_NOR_SRAM_CS1_T_TR": { "value": "1" }, "PCW_NOR_SRAM_CS1_T_WC": { "value": "11" }, "PCW_NOR_SRAM_CS1_T_WP": { "value": "1" }, "PCW_NOR_SRAM_CS1_WE_TIME": { "value": "0" }, "PCW_OVERRIDE_BASIC_CLOCK": { "value": "0" }, "PCW_P2F_ENET0_INTR": { "value": "0" }, "PCW_P2F_GPIO_INTR": { "value": "0" }, "PCW_P2F_QSPI_INTR": { "value": "0" }, "PCW_P2F_SDIO0_INTR": { "value": "0" }, "PCW_P2F_UART0_INTR": { "value": "0" }, "PCW_P2F_USB0_INTR": { "value": "0" }, "PCW_PACKAGE_DDR_BOARD_DELAY0": { "value": "0.279" }, "PCW_PACKAGE_DDR_BOARD_DELAY1": { "value": "0.260" }, "PCW_PACKAGE_DDR_BOARD_DELAY2": { "value": "0.085" }, "PCW_PACKAGE_DDR_BOARD_DELAY3": { "value": "0.092" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0": { "value": "-0.051" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1": { "value": "-0.006" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2": { "value": "-0.009" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3": { "value": "-0.033" }, "PCW_PACKAGE_NAME": { "value": "clg400" }, "PCW_PCAP_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_PCAP_PERIPHERAL_FREQMHZ": { "value": "200" }, "PCW_PERIPHERAL_BOARD_PRESET": { "value": "part0" }, "PCW_PLL_BYPASSMODE_ENABLE": { "value": "0" }, "PCW_PRESET_BANK0_VOLTAGE": { "value": "LVCMOS 3.3V" }, "PCW_PRESET_BANK1_VOLTAGE": { "value": "LVCMOS 1.8V" }, "PCW_PS7_SI_REV": { "value": "PRODUCTION" }, "PCW_QSPI_GRP_FBCLK_ENABLE": { "value": "1" }, "PCW_QSPI_GRP_FBCLK_IO": { "value": "MIO 8" }, "PCW_QSPI_GRP_IO1_ENABLE": { "value": "0" }, "PCW_QSPI_GRP_SINGLE_SS_ENABLE": { "value": "1" }, "PCW_QSPI_GRP_SINGLE_SS_IO": { "value": "MIO 1 .. 6" }, "PCW_QSPI_GRP_SS1_ENABLE": { "value": "0" }, "PCW_QSPI_INTERNAL_HIGHADDRESS": { "value": "0xFCFFFFFF" }, "PCW_QSPI_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_QSPI_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_QSPI_PERIPHERAL_FREQMHZ": { "value": "200" }, "PCW_QSPI_QSPI_IO": { "value": "MIO 1 .. 6" }, "PCW_SD0_GRP_CD_ENABLE": { "value": "1" }, "PCW_SD0_GRP_CD_IO": { "value": "MIO 47" }, "PCW_SD0_GRP_POW_ENABLE": { "value": "0" }, "PCW_SD0_GRP_WP_ENABLE": { "value": "0" }, "PCW_SD0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_SD0_SD0_IO": { "value": "MIO 40 .. 45" }, "PCW_SD1_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_SDIO0_BASEADDR": { "value": "0xE0100000" }, "PCW_SDIO0_HIGHADDR": { "value": "0xE0100FFF" }, "PCW_SDIO_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_SDIO_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_SDIO_PERIPHERAL_VALID": { "value": "1" }, "PCW_SINGLE_QSPI_DATA_MODE": { "value": "x4" }, "PCW_SMC_CYCLE_T0": { "value": "NA" }, "PCW_SMC_CYCLE_T1": { "value": "NA" }, "PCW_SMC_CYCLE_T2": { "value": "NA" }, "PCW_SMC_CYCLE_T3": { "value": "NA" }, "PCW_SMC_CYCLE_T4": { "value": "NA" }, "PCW_SMC_CYCLE_T5": { "value": "NA" }, "PCW_SMC_CYCLE_T6": { "value": "NA" }, "PCW_SMC_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_SMC_PERIPHERAL_VALID": { "value": "0" }, "PCW_SPI0_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_SPI1_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_SPI_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_SPI_PERIPHERAL_VALID": { "value": "0" }, "PCW_S_AXI_HP0_DATA_WIDTH": { "value": "64" }, "PCW_S_AXI_HP1_DATA_WIDTH": { "value": "64" }, "PCW_S_AXI_HP2_DATA_WIDTH": { "value": "64" }, "PCW_S_AXI_HP3_DATA_WIDTH": { "value": "64" }, "PCW_TPIU_PERIPHERAL_CLKSRC": { "value": "External" }, "PCW_TTC0_CLK0_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0": { "value": "1" }, "PCW_TTC0_CLK1_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0": { "value": "1" }, "PCW_TTC0_CLK2_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0": { "value": "1" }, "PCW_TTC1_CLK0_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0": { "value": "1" }, "PCW_TTC1_CLK1_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0": { "value": "1" }, "PCW_TTC1_CLK2_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0": { "value": "1" }, "PCW_UART0_BASEADDR": { "value": "0xE0000000" }, "PCW_UART0_BAUD_RATE": { "value": "115200" }, "PCW_UART0_GRP_FULL_ENABLE": { "value": "0" }, "PCW_UART0_HIGHADDR": { "value": "0xE0000FFF" }, "PCW_UART0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_UART0_UART0_IO": { "value": "MIO 14 .. 15" }, "PCW_UART1_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_UART_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_UART_PERIPHERAL_FREQMHZ": { "value": "100" }, "PCW_UART_PERIPHERAL_VALID": { "value": "1" }, "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": { "value": "525.000000" }, "PCW_UIPARAM_DDR_ADV_ENABLE": { "value": "0" }, "PCW_UIPARAM_DDR_AL": { "value": "0" }, "PCW_UIPARAM_DDR_BL": { "value": "8" }, "PCW_UIPARAM_DDR_BOARD_DELAY0": { "value": "0.279" }, "PCW_UIPARAM_DDR_BOARD_DELAY1": { "value": "0.260" }, "PCW_UIPARAM_DDR_BOARD_DELAY2": { "value": "0.085" }, "PCW_UIPARAM_DDR_BOARD_DELAY3": { "value": "0.092" }, "PCW_UIPARAM_DDR_BUS_WIDTH": { "value": "16 Bit" }, "PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM": { "value": "27.95" }, "PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH": { "value": "80.4535" }, "PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM": { "value": "27.95" }, "PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH": { "value": "80.4535" }, "PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH": { "value": "80.4535" }, "PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH": { "value": "80.4535" }, "PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_STOP_EN": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_0_LENGTH_MM": { "value": "32.14" }, "PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH": { "value": "105.056" }, "PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_1_LENGTH_MM": { "value": "31.12" }, "PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH": { "value": "66.904" }, "PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_2_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH": { "value": "89.1715" }, "PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_3_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH": { "value": "113.63" }, "PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0": { "value": "-0.051" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1": { "value": "-0.006" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2": { "value": "-0.009" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3": { "value": "-0.033" }, "PCW_UIPARAM_DDR_DQ_0_LENGTH_MM": { "value": "32.2" }, "PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH": { "value": "98.503" }, "PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQ_1_LENGTH_MM": { "value": "31.08" }, "PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH": { "value": "68.5855" }, "PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQ_2_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH": { "value": "90.295" }, "PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQ_3_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH": { "value": "103.977" }, "PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_ECC": { "value": "Disabled" }, "PCW_UIPARAM_DDR_ENABLE": { "value": "1" }, "PCW_UIPARAM_DDR_FREQ_MHZ": { "value": "525" }, "PCW_UIPARAM_DDR_HIGH_TEMP": { "value": "Normal (0-85)" }, "PCW_UIPARAM_DDR_MEMORY_TYPE": { "value": "DDR 3" }, "PCW_UIPARAM_DDR_PARTNO": { "value": "MT41J256M16 RE-125" }, "PCW_UIPARAM_DDR_TRAIN_DATA_EYE": { "value": "1" }, "PCW_UIPARAM_DDR_TRAIN_READ_GATE": { "value": "1" }, "PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL": { "value": "1" }, "PCW_UIPARAM_DDR_USE_INTERNAL_VREF": { "value": "0" }, "PCW_UIPARAM_GENERATE_SUMMARY": { "value": "NA" }, "PCW_USB0_BASEADDR": { "value": "0xE0102000" }, "PCW_USB0_HIGHADDR": { "value": "0xE0102fff" }, "PCW_USB0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_USB0_RESET_ENABLE": { "value": "1" }, "PCW_USB0_RESET_IO": { "value": "MIO 46" }, "PCW_USB0_USB0_IO": { "value": "MIO 28 .. 39" }, "PCW_USB1_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_USB_RESET_ENABLE": { "value": "1" }, "PCW_USB_RESET_POLARITY": { "value": "Active Low" }, "PCW_USB_RESET_SELECT": { "value": "Share reset pin" }, "PCW_USE_AXI_FABRIC_IDLE": { "value": "0" }, "PCW_USE_AXI_NONSECURE": { "value": "0" }, "PCW_USE_CORESIGHT": { "value": "0" }, "PCW_USE_CROSS_TRIGGER": { "value": "0" }, "PCW_USE_CR_FABRIC": { "value": "1" }, "PCW_USE_DDR_BYPASS": { "value": "0" }, "PCW_USE_DEBUG": { "value": "0" }, "PCW_USE_DMA0": { "value": "0" }, "PCW_USE_DMA1": { "value": "0" }, "PCW_USE_DMA2": { "value": "0" }, "PCW_USE_DMA3": { "value": "0" }, "PCW_USE_EXPANDED_IOP": { "value": "0" }, "PCW_USE_FABRIC_INTERRUPT": { "value": "1" }, "PCW_USE_HIGH_OCM": { "value": "0" }, "PCW_USE_M_AXI_GP0": { "value": "1" }, "PCW_USE_M_AXI_GP1": { "value": "0" }, "PCW_USE_PROC_EVENT_BUS": { "value": "0" }, "PCW_USE_PS_SLCR_REGISTERS": { "value": "0" }, "PCW_USE_S_AXI_ACP": { "value": "0" }, "PCW_USE_S_AXI_GP0": { "value": "0" }, "PCW_USE_S_AXI_GP1": { "value": "0" }, "PCW_USE_S_AXI_HP0": { "value": "0" }, "PCW_USE_S_AXI_HP1": { "value": "0" }, "PCW_USE_S_AXI_HP2": { "value": "0" }, "PCW_USE_S_AXI_HP3": { "value": "0" }, "PCW_USE_TRACE": { "value": "0" }, "PCW_VALUE_SILVERSION": { "value": "3" }, "PCW_WDT_PERIPHERAL_CLKSRC": { "value": "CPU_1X" }, "PCW_WDT_PERIPHERAL_DIVISOR0": { "value": "1" } }, "interface_ports": { "M_AXI_GP0": { "vlnv": "xilinx.com:interface:aximm_rtl:1.0", "mode": "Master", "address_space_ref": "Data", "base_address": { "minimum": "0x40000000", "maximum": "0x7FFFFFFF", "width": "32" } } }, "addressing": { "address_spaces": { "Data": { "range": "4G", "width": "32", "local_memory_map": { "name": "Data", "description": "Address Space Segments", "address_blocks": { "segment1": { "name": "segment1", "display_name": "segment1", "base_address": "0x00000000", "range": "256K", "width": "18", "usage": "register" }, "segment2": { "name": "segment2", "display_name": "segment2", "base_address": "0x00040000", "range": "256K", "width": "19", "usage": "register" }, "segment3": { "name": "segment3", "display_name": "segment3", "base_address": "0x00080000", "range": "512K", "width": "20", "usage": "register" }, "segment4": { "name": "segment4", "display_name": "segment4", "base_address": "0x00100000", "range": "1023M", "width": "30", "usage": "register" }, "M_AXI_GP0": { "name": "M_AXI_GP0", "display_name": "M_AXI_GP0", "base_address": "0x40000000", "range": "1G", "width": "31", "usage": "register" }, "M_AXI_GP1": { "name": "M_AXI_GP1", "display_name": "M_AXI_GP1", "base_address": "0x80000000", "range": "1G", "width": "32", "usage": "register" }, "IO_Peripheral_Registers": { "name": "IO_Peripheral_Registers", "display_name": "IO Peripheral Registers", "base_address": "0xE0000000", "range": "3M", "width": "32", "usage": "register" }, "SMC_Memories": { "name": "SMC_Memories", "display_name": "SMC Memories", "base_address": "0xE1000000", "range": "80M", "width": "32", "usage": "register" }, "SLCR_Registers": { "name": "SLCR_Registers", "display_name": "SLCR Registers", "base_address": "0xF8000000", "range": "3K", "width": "32", "usage": "register" }, "PS_System_Registers": { "name": "PS_System_Registers", "display_name": "PS System Registers", "base_address": "0xF8001000", "range": "8252K", "width": "32", "usage": "register" }, "CPU_Private_Registers": { "name": "CPU_Private_Registers", "display_name": "CPU Private Registers", "base_address": "0xF8900000", "range": "6156K", "width": "32", "usage": "register" }, "segment5": { "name": "segment5", "display_name": "segment5", "base_address": "0xFC000000", "range": "32M", "width": "32", "usage": "register" }, "segment6": { "name": "segment6", "display_name": "segment6", "base_address": "0xFFFC0000", "range": "256K", "width": "32", "usage": "register" } } } } } } }, "axi_interconnect_0": { "vlnv": "xilinx.com:ip:axi_interconnect:2.1", "xci_path": "ip/toplevel_axi_interconnect_0_0/toplevel_axi_interconnect_0_0.xci", "inst_hier_path": "axi_interconnect_0", "xci_name": "toplevel_axi_interconnect_0_0", "parameters": { "NUM_MI": { "value": "4" } }, "interface_ports": { "S00_AXI": { "mode": "Slave", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M00_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M01_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M02_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M03_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_RESET": { "value": "ARESETN" } } }, "ARESETN": { "type": "rst", "direction": "I" }, "S00_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S00_AXI" }, "ASSOCIATED_RESET": { "value": "S00_ARESETN" } } }, "S00_ARESETN": { "type": "rst", "direction": "I" }, "M00_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M00_AXI" }, "ASSOCIATED_RESET": { "value": "M00_ARESETN" } } }, "M00_ARESETN": { "type": "rst", "direction": "I" }, "M01_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M01_AXI" }, "ASSOCIATED_RESET": { "value": "M01_ARESETN" } } }, "M01_ARESETN": { "type": "rst", "direction": "I" }, "M02_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M02_AXI" }, "ASSOCIATED_RESET": { "value": "M02_ARESETN" } } }, "M02_ARESETN": { "type": "rst", "direction": "I" }, "M03_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M03_AXI" }, "ASSOCIATED_RESET": { "value": "M03_ARESETN" } } }, "M03_ARESETN": { "type": "rst", "direction": "I" } }, "components": { "xbar": { "vlnv": "xilinx.com:ip:axi_crossbar:2.1", "ip_revision": "32", "xci_name": "toplevel_xbar_0", "xci_path": "ip/toplevel_xbar_0/toplevel_xbar_0.xci", "inst_hier_path": "axi_interconnect_0/xbar", "parameters": { "NUM_MI": { "value": "4" }, "NUM_SI": { "value": "1" }, "STRATEGY": { "value": "0" } }, "interface_ports": { "S00_AXI": { "vlnv": "xilinx.com:interface:aximm_rtl:1.0", "mode": "Slave", "bridges": [ "M00_AXI", "M01_AXI", "M02_AXI", "M03_AXI" ] } } }, "s00_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "components": { "auto_pc": { "vlnv": "xilinx.com:ip:axi_protocol_converter:2.1", "ip_revision": "31", "xci_name": "toplevel_auto_pc_0", "xci_path": "ip/toplevel_auto_pc_0/toplevel_auto_pc_0.xci", "inst_hier_path": "axi_interconnect_0/s00_couplers/auto_pc", "parameters": { "MI_PROTOCOL": { "value": "AXI4LITE" }, "SI_PROTOCOL": { "value": "AXI3" } }, "interface_ports": { "S_AXI": { "vlnv": "xilinx.com:interface:aximm_rtl:1.0", "mode": "Slave", "bridges": [ "M_AXI" ] } } } }, "interface_nets": { "auto_pc_to_s00_couplers": { "interface_ports": [ "M_AXI", "auto_pc/M_AXI" ] }, "s00_couplers_to_auto_pc": { "interface_ports": [ "S_AXI", "auto_pc/S_AXI" ] } }, "nets": { "S_ACLK_1": { "ports": [ "S_ACLK", "auto_pc/aclk" ] }, "S_ARESETN_1": { "ports": [ "S_ARESETN", "auto_pc/aresetn" ] } } }, "m00_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m00_couplers_to_m00_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } }, "m01_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m01_couplers_to_m01_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } }, "m02_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m02_couplers_to_m02_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } }, "m03_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m03_couplers_to_m03_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } } }, "interface_nets": { "axi_interconnect_0_to_s00_couplers": { "interface_ports": [ "S00_AXI", "s00_couplers/S_AXI" ] }, "m00_couplers_to_axi_interconnect_0": { "interface_ports": [ "m00_couplers/M_AXI", "M00_AXI" ] }, "m01_couplers_to_axi_interconnect_0": { "interface_ports": [ "m01_couplers/M_AXI", "M01_AXI" ] }, "m02_couplers_to_axi_interconnect_0": { "interface_ports": [ "m02_couplers/M_AXI", "M02_AXI" ] }, "m03_couplers_to_axi_interconnect_0": { "interface_ports": [ "m03_couplers/M_AXI", "M03_AXI" ] }, "s00_couplers_to_xbar": { "interface_ports": [ "s00_couplers/M_AXI", "xbar/S00_AXI" ] }, "xbar_to_m00_couplers": { "interface_ports": [ "xbar/M00_AXI", "m00_couplers/S_AXI" ] }, "xbar_to_m01_couplers": { "interface_ports": [ "xbar/M01_AXI", "m01_couplers/S_AXI" ] }, "xbar_to_m02_couplers": { "interface_ports": [ "xbar/M02_AXI", "m02_couplers/S_AXI" ] }, "xbar_to_m03_couplers": { "interface_ports": [ "xbar/M03_AXI", "m03_couplers/S_AXI" ] } }, "nets": { "axi_interconnect_0_ACLK_net": { "ports": [ "ACLK", "xbar/aclk", "s00_couplers/S_ACLK", "s00_couplers/M_ACLK", "m00_couplers/M_ACLK", "m01_couplers/M_ACLK", "m02_couplers/M_ACLK", "m03_couplers/M_ACLK", "m00_couplers/S_ACLK", "m01_couplers/S_ACLK", "m02_couplers/S_ACLK", "m03_couplers/S_ACLK" ] }, "axi_interconnect_0_ARESETN_net": { "ports": [ "ARESETN", "xbar/aresetn", "s00_couplers/S_ARESETN", "s00_couplers/M_ARESETN", "m00_couplers/M_ARESETN", "m01_couplers/M_ARESETN", "m02_couplers/M_ARESETN", "m03_couplers/M_ARESETN", "m00_couplers/S_ARESETN", "m01_couplers/S_ARESETN", "m02_couplers/S_ARESETN", "m03_couplers/S_ARESETN" ] } } }, "proc_sys_reset_0": { "vlnv": "xilinx.com:ip:proc_sys_reset:5.0", "ip_revision": "15", "xci_name": "toplevel_proc_sys_reset_0_0", "xci_path": "ip/toplevel_proc_sys_reset_0_0/toplevel_proc_sys_reset_0_0.xci", "inst_hier_path": "proc_sys_reset_0" }, "axi_gpio_0": { "vlnv": "xilinx.com:ip:axi_gpio:2.0", "ip_revision": "33", "xci_name": "toplevel_axi_gpio_0_0", "xci_path": "ip/toplevel_axi_gpio_0_0/toplevel_axi_gpio_0_0.xci", "inst_hier_path": "axi_gpio_0", "parameters": { "GPIO_BOARD_INTERFACE": { "value": "arduino_a0_a5" }, "USE_BOARD_FLOW": { "value": "true" } } }, "spi_axi_perpih_0": { "vlnv": "user.org:user:spi_axi_perpih:1.0", "ip_revision": "12", "xci_name": "toplevel_spi_axi_perpih_0_0", "xci_path": "ip/toplevel_spi_axi_perpih_0_0/toplevel_spi_axi_perpih_0_0.xci", "inst_hier_path": "spi_axi_perpih_0" }, "axi_timer_0": { "vlnv": "xilinx.com:ip:axi_timer:2.0", "ip_revision": "33", "xci_name": "toplevel_axi_timer_0_0", "xci_path": "ip/toplevel_axi_timer_0_0/toplevel_axi_timer_0_0.xci", "inst_hier_path": "axi_timer_0" }, "axi_timer_1": { "vlnv": "xilinx.com:ip:axi_timer:2.0", "ip_revision": "33", "xci_name": "toplevel_axi_timer_0_1", "xci_path": "ip/toplevel_axi_timer_0_1/toplevel_axi_timer_0_1.xci", "inst_hier_path": "axi_timer_1" }, "xlconcat_0": { "vlnv": "xilinx.com:ip:xlconcat:2.1", "ip_revision": "6", "xci_name": "toplevel_xlconcat_0_0", "xci_path": "ip/toplevel_xlconcat_0_0/toplevel_xlconcat_0_0.xci", "inst_hier_path": "xlconcat_0", "parameters": { "NUM_PORTS": { "value": "3" } } } }, "interface_nets": { "axi_gpio_0_GPIO": { "interface_ports": [ "arduino_a0_a5", "axi_gpio_0/GPIO" ] }, "axi_interconnect_0_M00_AXI": { "interface_ports": [ "axi_interconnect_0/M00_AXI", "axi_gpio_0/S_AXI" ] }, "axi_interconnect_0_M01_AXI": { "interface_ports": [ "axi_interconnect_0/M01_AXI", "spi_axi_perpih_0/S00_AXI" ] }, "axi_interconnect_0_M02_AXI": { "interface_ports": [ "axi_interconnect_0/M02_AXI", "axi_timer_0/S_AXI" ] }, "axi_interconnect_0_M03_AXI": { "interface_ports": [ "axi_interconnect_0/M03_AXI", "axi_timer_1/S_AXI" ] }, "processing_system7_0_DDR": { "interface_ports": [ "DDR", "processing_system7_0/DDR" ] }, "processing_system7_0_FIXED_IO": { "interface_ports": [ "FIXED_IO", "processing_system7_0/FIXED_IO" ] }, "processing_system7_0_M_AXI_GP0": { "interface_ports": [ "processing_system7_0/M_AXI_GP0", "axi_interconnect_0/S00_AXI" ] } }, "nets": { "axi_timer_0_interrupt": { "ports": [ "axi_timer_0/interrupt", "xlconcat_0/In1" ] }, "axi_timer_1_interrupt": { "ports": [ "axi_timer_1/interrupt", "xlconcat_0/In2" ] }, "csn_i_0_1": { "ports": [ "csn_i_0", "spi_axi_perpih_0/csn_i" ] }, "miso_i_0_1": { "ports": [ "miso_i_0", "spi_axi_perpih_0/miso_i" ] }, "mosi_i_0_1": { "ports": [ "mosi_i_0", "spi_axi_perpih_0/mosi_i" ] }, "proc_sys_reset_0_peripheral_aresetn": { "ports": [ "proc_sys_reset_0/peripheral_aresetn", "axi_interconnect_0/ARESETN", "axi_interconnect_0/S00_ARESETN", "axi_gpio_0/s_axi_aresetn", "axi_interconnect_0/M00_ARESETN", "axi_interconnect_0/M01_ARESETN", "spi_axi_perpih_0/s00_axi_aresetn", "axi_timer_0/s_axi_aresetn", "axi_interconnect_0/M02_ARESETN", "axi_timer_1/s_axi_aresetn", "axi_interconnect_0/M03_ARESETN" ] }, "processing_system7_0_FCLK_CLK0": { "ports": [ "processing_system7_0/FCLK_CLK0", "axi_interconnect_0/ACLK", "proc_sys_reset_0/slowest_sync_clk", "processing_system7_0/M_AXI_GP0_ACLK", "axi_interconnect_0/S00_ACLK", "axi_gpio_0/s_axi_aclk", "axi_interconnect_0/M00_ACLK", "axi_interconnect_0/M01_ACLK", "spi_axi_perpih_0/s00_axi_aclk", "axi_timer_0/s_axi_aclk", "axi_interconnect_0/M02_ACLK", "axi_timer_1/s_axi_aclk", "axi_interconnect_0/M03_ACLK" ] }, "processing_system7_0_FCLK_RESET0_N": { "ports": [ "processing_system7_0/FCLK_RESET0_N", "proc_sys_reset_0/ext_reset_in" ] }, "sck_i_0_1": { "ports": [ "sck_i_0", "spi_axi_perpih_0/sck_i" ] }, "spi_axi_perpih_0_csn_o": { "ports": [ "spi_axi_perpih_0/csn_o", "csn_o_0" ] }, "spi_axi_perpih_0_csn_t": { "ports": [ "spi_axi_perpih_0/csn_t", "csn_t_0" ] }, "spi_axi_perpih_0_interrupt": { "ports": [ "spi_axi_perpih_0/interrupt", "xlconcat_0/In0" ] }, "spi_axi_perpih_0_miso_o": { "ports": [ "spi_axi_perpih_0/miso_o", "miso_o_0" ] }, "spi_axi_perpih_0_miso_t": { "ports": [ "spi_axi_perpih_0/miso_t", "miso_t_0" ] }, "spi_axi_perpih_0_mosi_o": { "ports": [ "spi_axi_perpih_0/mosi_o", "mosi_o_0" ] }, "spi_axi_perpih_0_mosi_t": { "ports": [ "spi_axi_perpih_0/mosi_t", "mosi_t_0" ] }, "spi_axi_perpih_0_sck_o": { "ports": [ "spi_axi_perpih_0/sck_o", "sck_o_0" ] }, "spi_axi_perpih_0_sck_t": { "ports": [ "spi_axi_perpih_0/sck_t", "sck_t_0" ] }, "xlconcat_0_dout": { "ports": [ "xlconcat_0/dout", "processing_system7_0/IRQ_F2P" ] } }, "addressing": { "/processing_system7_0": { "address_spaces": { "Data": { "segments": { "SEG_axi_gpio_0_Reg": { "address_block": "/axi_gpio_0/S_AXI/Reg", "offset": "0x41200000", "range": "64K" }, "SEG_axi_timer_0_Reg": { "address_block": "/axi_timer_0/S_AXI/Reg", "offset": "0x42800000", "range": "64K" }, "SEG_axi_timer_1_Reg": { "address_block": "/axi_timer_1/S_AXI/Reg", "offset": "0x42810000", "range": "64K" }, "SEG_spi_axi_perpih_0_S00_AXI_reg": { "address_block": "/spi_axi_perpih_0/S00_AXI/S00_AXI_reg", "offset": "0x43C00000", "range": "64K", "offset_base_param": "C_S00_AXI_BASEADDR", "offset_high_param": "C_S00_AXI_HIGHADDR" } } } } } } } }