#ifndef SPI_H
#define SPI_H

#include <stdint.h>
#include <stdbool.h>
#include "xparameters.h"

typedef struct {
  volatile uint32_t CTRL;
  volatile uint32_t INTMASK;
  volatile uint32_t STATUS;
  volatile uint32_t DATA;
} spi_peripheral_t;

#define SPI_CTRL_EN_POS 0UL
#define SPI_CTRL_EN_MSK (1UL << SPI_CTRL_EN_POS)
#define SPI_CTRL_MASTER_POS 1UL
#define SPI_CTRL_MASTER_MSK (1UL << SPI_CTRL_MASTER_POS)
#define SPI_CTRL_TX_EN_POS 2UL
#define SPI_CTRL_TX_EN_MSK (1UL << SPI_CTRL_TX_EN_POS)
#define SPI_CTRL_RX_EN_POS 3UL
#define SPI_CTRL_RX_EN_MSK (1UL << SPI_CTRL_RX_EN_POS)
#define SPI_CTRL_CLOCK_POLARITY_POS 4UL
#define SPI_CTRL_CLOCK_POLARITY_MSK (1UL << SPI_CTRL_CLOCK_POLARITY_POS)
#define SPI_CTRL_CLOCK_PHASE_POS 5UL
#define SPI_CTRL_CLOCK_PHASE_MSK (1UL << SPI_CTRL_CLOCK_POLARITY_POS)
#define SPI_CTRL_PULSE_CSN_POS 6UL
#define SPI_CTRL_PULSE_CSN_MSK (1UL << SPI_CTRL_PULSE_CSN_POS)
#define SPI_CTRL_LSBFIRST_POS 6UL
#define SPI_CTRL_LSBFIRST_MSK (1UL << SPI_CTRL_LSBFIRST_POS)
#define SPI_CTRL_SIZE_SEL_POS 10UL
#define SPI_CTRL_SIZE_SEL_MSK (1UL << SPI_CTRL_SIZE_SEL_POS)
#define SPI_CTRL_DIV_SEL_POS 20UL
#define SPI_CTRL_DIV_SEL_MSK (0x7UL << SPI_CTRL_DIV_SEL_POS)

#define SPI_INTMASK_RX_FULL_POS 0UL
#define SPI_INTMASK_RX_FULL_MSK (1UL << SPI_INTMASK_RX_FULL_POS)
#define SPI_INTMASK_TX_EMPTY_POS 1UL
#define SPI_INTMASK_TX_EMPTY_MSK (1UL << SPI_INTMASK_TX_EMPTY_POS)
#define SPI_INTMASK_LOST_RX_POS 4UL
#define SPI_INTMASK_LOST_RX_MSK (1UL << SPI_INTMASK_LOST_RX_POS)

#define SPI_STATUS_RX_FULL_POS 0
#define SPI_STATUS_RX_FULL_MSK (1UL << SPI_STATUS_RX_FULL_POS)
#define SPI_STATUS_TX_EMPTY_POS 1UL
#define SPI_STATUS_TX_EMPTY_MSK (1UL << SPI_STATUS_TX_EMPTY_POS)
#define SPI_STATUS_BUSY_POS 3UL
#define SPI_STATUS_BUSY_MSK (1UL << SPI_STATUS_BUSY_POS)
#define SPI_STATUS_LOST_RX_POS 4UL
#define SPI_STATUS_LOST_RX_MSK (1UL << SPI_STATUS_LOST_RX_POS)

#define SPI_DATA_POS 0x0UL
#define SPI_DATA_MSK 0xFFFFUL

#define SPI0 ((spi_peripheral_t*)XPAR_SPI_AXI_PERPIH_0_S00_AXI_BASEADDR)
#define SPI0_INT_ID 61 // connected to INT f2p[0]

typedef enum {
  SPI_FRAME_8_BIT = 0,
  SPI_FRAME_16_BIT = 1,
} spi_frame_format_t;

typedef enum {
  SPI_MSB_FIRST = 0,
  SPI_LSB_FIRST = 1,
} spi_frame_orientation_t;

typedef struct {
  spi_peripheral_t* periph;
  uint8_t idx;
} spi_t;

void spi_init(spi_t* spi, spi_peripheral_t* peripheral);

void spi_master_configure_speed(spi_t *spi,
                                uint8_t divider);

void spi_master_configure(spi_t *spi, bool clock_polarity,
                          bool clock_phase, spi_frame_orientation_t orientation, spi_frame_format_t format);
void spi_master_enable(spi_t* spi, bool enable);

void spi_slave_configure(spi_t *spi, bool sw_nss, bool clock_polarity,
                         bool clock_phase, spi_frame_orientation_t orientation, spi_frame_format_t format);
void spi_slave_enable(spi_t *spi, bool enable);

uint16_t spi_transmit(spi_t* spi, uint16_t* data, uint16_t size);
uint16_t spi_receive(spi_t *spi, uint16_t *buffer, uint16_t max_size);

bool spi_can_transmit(spi_t* spi);
uint16_t spi_can_receive(spi_t* spi);

bool spi_enable_interrupt(spi_t* spi, bool tx, bool rx);

#endif // SPI_H
