From 1c83890e53ae5cc62f7c80b98259928324dc0f5c Mon Sep 17 00:00:00 2001 From: Rutherther Date: Wed, 31 Jan 2024 13:36:05 +0100 Subject: [PATCH] fix: ssd1306 logic --- src/ssd1306/counter.vhd | 33 +++++++++++--------- src/ssd1306/ssd1306_counter_master_logic.vhd | 13 +++++--- 2 files changed, 28 insertions(+), 18 deletions(-) diff --git a/src/ssd1306/counter.vhd b/src/ssd1306/counter.vhd index 8552ddc241935da7290dae9de8cc22a9565381ba..c6c80221e8a8fcc3ee54b29a771bed09644f313e 100644 --- a/src/ssd1306/counter.vhd +++ b/src/ssd1306/counter.vhd @@ -45,6 +45,7 @@ architecture a1 of ssd1306_counter is signal rst_n : std_logic; signal rst_sync : std_logic; + signal i2c_rst_n : std_logic; signal i2c_clk : std_logic; @@ -86,23 +87,25 @@ begin -- architecture a+ err_general_o <= err_general; any_err <= err_general or err_arbitration or err_noack_address or err_noack_data; - counter_master_logic: entity work.ssd1306_counter_master_logic + counter_master_logic : entity work.ssd1306_counter_master_logic generic map ( DIGITS => DIGITS, I2C_CLK_FREQ => I2C_CLK_FREQ) port map ( - clk_i => i2c_clk, - rst_in => rst_n, - start_i => start_i, - count_i => count, - tx_valid_o => tx_valid, - tx_ready_i => tx_ready, - tx_data_o => tx_data, - dev_busy_i => dev_busy, - waiting_i => waiting, - any_err_i => any_err, - state_o => state_o, - substate_o => substate_o); + clk_i => i2c_clk, + rst_in => rst_n, + start_i => start_i, + count_i => count, + master_start_o => master_start, + master_stop_o => master_stop, + tx_valid_o => tx_valid, + tx_ready_i => tx_ready, + tx_data_o => tx_data, + dev_busy_i => dev_busy, + waiting_i => waiting, + any_err_i => any_err, + state_o => state_o, + substate_o => substate_o); counter: entity utils.counter generic map ( @@ -123,13 +126,15 @@ begin -- architecture a+ clk_i => clk_i, clk_o => i2c_clk); + i2c_rst_n <= rst_n and not start_i; + i2c_master: entity i2c.master generic map ( SCL_FALLING_DELAY => DELAY, SCL_MIN_STABLE_CYCLES => SCL_MIN_STABLE_CYCLES) port map ( clk_i => i2c_clk, - rst_in => rst_n, + rst_in => i2c_rst_n, -- slave_address_i => ADDRESS, -- diff --git a/src/ssd1306/ssd1306_counter_master_logic.vhd b/src/ssd1306/ssd1306_counter_master_logic.vhd index 8ee0f803784330ef461af46e01c0f7421add39dd..1e2e52539bd6578fd367d8403ce5ff32eaf53040 100644 --- a/src/ssd1306/ssd1306_counter_master_logic.vhd +++ b/src/ssd1306/ssd1306_counter_master_logic.vhd @@ -18,6 +18,9 @@ entity ssd1306_counter_master_logic is count_i : in std_logic_vector(DIGITS*4 - 1 downto 0); + master_start_o : out std_logic; + master_stop_o : out std_logic; + tx_valid_o : out std_logic; tx_ready_i : in std_logic; tx_data_o : out std_logic_vector(7 downto 0); @@ -32,8 +35,6 @@ entity ssd1306_counter_master_logic is end entity ssd1306_counter_master_logic; architecture a1 of ssd1306_counter_master_logic is - signal master_start, master_stop : std_logic; - type state_t is (IDLE, INIT_DISPLAY, INIT_ADDRESSING_MODE, ZERO_OUT_RAM, SET_ADR_ZERO, DIGIT_N, SEC_DELAY); signal curr_state : state_t; signal next_state : state_t; @@ -86,8 +87,8 @@ begin -- architecture a1 digit_data <= ssd1306_bcd_digit_data(count_i(((DIGITS - 1 - curr_digit) + 1) * 4 - 1 downto (DIGITS - 1 - curr_digit) * 4)); - master_start <= '1' when curr_substate = START else '0'; - master_stop <= '1' when curr_substate = STOP else '0'; + master_start_o <= '1' when curr_substate = START else '0'; + master_stop_o <= '1' when curr_substate = STOP else '0'; set_next_state: process (all) is begin -- process set_next_state @@ -124,6 +125,10 @@ begin -- architecture a1 if any_err_i = '1' then next_state <= IDLE; end if; + + if start_i = '1' then + next_state <= IDLE; + end if; end process set_next_state; set_next_substate: process (all) is