From 89e944c05b3c054fee5be670cd1b00e0e487819b Mon Sep 17 00:00:00 2001
From: Rutherther <rutherther@proton.me>
Date: Sat, 23 Dec 2023 18:56:36 +0100
Subject: [PATCH] fix: sign extend only when misaligned access

---
 src/stages/memory_access.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/stages/memory_access.sv b/src/stages/memory_access.sv
index bf6a5f4..50e32bb 100644
--- a/src/stages/memory_access.sv
+++ b/src/stages/memory_access.sv
@@ -78,7 +78,7 @@ module memory_access(
     memory_write = 32'bX;
     memory_byte_enable = 4'bX;
     // regular access (or not access at all)
-    if (offset_position == 1'b0) begin
+    if (misaligned_access == 1'b0) begin
       memory_byte_enable = mask_to_mask_bytes(.mask(memory_mask)) << bit_position;
       memory_write = stage_in.reg_rd2 << (8*bit_position);
       read_data = mem_sext_maybe(
-- 
2.48.1