From 38e84297e0e6abf0ec14d91878d5210792b801bd Mon Sep 17 00:00:00 2001
From: Rutherther <rutherther@proton.me>
Date: Sun, 12 Nov 2023 12:09:12 +0100
Subject: [PATCH] fix: shift left only by 5 bits

---
 src/alu.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/alu.sv b/src/alu.sv
index 4036cd7..c47c804 100755
--- a/src/alu.sv
+++ b/src/alu.sv
@@ -23,7 +23,7 @@ module alu(
 
     case (op)
       3'b000 : out = a + real_b;
-      3'b001 : out = a << real_b;
+      3'b001 : out = a << real_b[4:0];
       3'b010 : out = (signed'(a) < signed'(real_b)) ? 1 : 0;
       3'b011 : out = (a < real_b) ? 1 : 0;
       3'b100 : out = a ^ real_b;
-- 
2.48.1