From e93f5885314825e5ca6125b2274034dcedbb2132 Mon Sep 17 00:00:00 2001
From: Rutherther <rutherther@protonmail.com>
Date: Sat, 5 Oct 2024 18:25:02 +0200
Subject: [PATCH] feat: use cmsis for register definitions

---
 .gitmodules          |  6 ++++++
 Makefile             |  7 ++++++-
 libs/CMSIS_6         |  1 +
 libs/cmsis_device_h7 |  1 +
 src/main.c           | 32 ++++++++------------------------
 5 files changed, 22 insertions(+), 25 deletions(-)
 create mode 100644 .gitmodules
 create mode 160000 libs/CMSIS_6
 create mode 160000 libs/cmsis_device_h7

diff --git a/.gitmodules b/.gitmodules
new file mode 100644
index 0000000000000000000000000000000000000000..778cb3c69bb283e861871e161257ee8ac165f52f
--- /dev/null
+++ b/.gitmodules
@@ -0,0 +1,6 @@
+[submodule "CMSIS"]
+	path = libs/CMSIS_6
+	url = https://github.com/ARM-software/CMSIS_6
+[submodule "cmsis_device_h7"]
+	path = libs/cmsis_device_h7
+	url = https://github.com/STMicroelectronics/cmsis_device_h7/
diff --git a/Makefile b/Makefile
index 7c22a27ede3e484f0f4a7248dfc4c5ba07c1fb5c..f6a4588067555e6f56109865929f0ff073464973 100644
--- a/Makefile
+++ b/Makefile
@@ -19,7 +19,12 @@ DEVICESRCS=$(wildcard $(DEVICEDIR)/*.c)
 SRCS=$(PROJSRCS) $(GENERALSRCS) $(DEVICESRCS)
 OBJS=$(patsubst %.c,obj/%.o,$(SRCS))
 
-CFLAGS=-I$(INCDIR) -I$(DEVICEDIR)/$(INCDIR) -mthumb -mcpu=$(CPU) -nostdlib -g -DCORE_CM7
+CFLAGS=-I$(INCDIR) \
+				-I$(DEVICEDIR)/$(INCDIR) \
+				-Ilibs/CMSIS_6/CMSIS/Core/Include \
+				-Ilibs/cmsis_device_h7/Include \
+				-mthumb -mcpu=$(CPU) -nostdlib -g \
+				-DCORE_CM7
 LDFLAGS=-T$(DEVICEDIR)/linker_script.ld -nostdlib
 
 CC=arm-none-eabi-gcc
diff --git a/libs/CMSIS_6 b/libs/CMSIS_6
new file mode 160000
index 0000000000000000000000000000000000000000..8c4dc58928b3347f6aa98b6fb2bf6770f32a72b7
--- /dev/null
+++ b/libs/CMSIS_6
@@ -0,0 +1 @@
+Subproject commit 8c4dc58928b3347f6aa98b6fb2bf6770f32a72b7
diff --git a/libs/cmsis_device_h7 b/libs/cmsis_device_h7
new file mode 160000
index 0000000000000000000000000000000000000000..13ba9da797a30e1563a8795f974425fb26dd0457
--- /dev/null
+++ b/libs/cmsis_device_h7
@@ -0,0 +1 @@
+Subproject commit 13ba9da797a30e1563a8795f974425fb26dd0457
diff --git a/src/main.c b/src/main.c
index 202d39414df9698a31f20ede4a5cbbc41e0b7936..ea6afd9952be6ae5535827ba44da2a8c969595a9 100644
--- a/src/main.c
+++ b/src/main.c
@@ -1,41 +1,25 @@
 #include <stdint.h>
-
-#define PERIPHERAL_BASE (0x40000000U)
-#define AHB4_BASE (PERIPHERAL_BASE + 0x18020000U)
-#define GPIOI_BASE (AHB4_BASE + 0x2000U)
-#define RCC_BASE (AHB4_BASE + 0x4400U)
-
-#define RCC_AHB4ENR_OFFSET (0xE0U)
-#define RCC_AHB4ENR ((volatile uint32_t*) (RCC_BASE + RCC_AHB4ENR_OFFSET))
-#define RCC_AHB4ENR_GPIOIEN (0x08U)
-
-#define GPIO_MODER_OFFSET (0x00U)
-#define GPIOI_MODER ((volatile uint32_t*) (GPIOI_BASE + GPIO_MODER_OFFSET))
-#define GPIO_MODER_MODER5 (10U)
-#define GPIO_MODER_MODER13 (26U)
-#define GPIO_MODER_MODER12 (24U)
-#define GPIO_ODR_OFFSET (0x14U)
-#define GPIOI_ODR ((volatile uint32_t*) (GPIOI_BASE + GPIO_ODR_OFFSET))
+#include "stm32h747xx.h"
 
 #define LED1_PIN 12
 #define LED2_PIN 13
 
 void main()
 {
- *RCC_AHB4ENR |= (1 << RCC_AHB4ENR_GPIOIEN);
+ RCC->AHB4ENR |= (1 << RCC_AHB4ENR_GPIOIEN_Pos);
 
   // do two dummy reads after enabling the peripheral clock
   volatile uint32_t dummy;
-  dummy = *(RCC_AHB4ENR);
-  dummy = *(RCC_AHB4ENR);
+  dummy = RCC->AHB4ENR;
+  dummy = RCC->AHB4ENR;
 
-  *GPIOI_MODER = (1 << GPIO_MODER_MODER12) | (1 << GPIO_MODER_MODER13);
+  GPIOI->MODER = (1 << GPIO_MODER_MODE12_Pos) | (1 << GPIO_MODER_MODE13_Pos);
 
-  *GPIOI_ODR ^= (1 << LED2_PIN);
+  GPIOI->ODR ^= (1 << LED2_PIN);
   while(1)
   {
-    *GPIOI_ODR ^= (1 << LED1_PIN);
-    *GPIOI_ODR ^= (1 << LED2_PIN);
+    GPIOI->ODR ^= (1 << LED1_PIN);
+    GPIOI->ODR ^= (1 << LED2_PIN);
     for (uint32_t i = 0; i < 2000000; i++);
   }
 }