A => Makefile +53 -0
@@ 1,53 @@
+DEVICE?=stm32h747
+TARGET?=stm32h7x
+CPU?=cortex-m7
+
+APP=blink.elf
+
+BINDIR=bin
+SRCDIR=src
+INCDIR=include
+OBJDIR=obj
+
+DEVICEDIR=devices/$(DEVICE)
+GENERALDIR=devices/general
+
+PROJSRCS=$(wildcard $(SRCDIR)/*.c)
+GENERALSRCS=$(wildcard $(GENERALDIR)/*.c)
+DEVICESRCS=$(wildcard $(DEVICEDIR)/*.c)
+
+SRCS=$(PROJSRCS) $(GENERALSRCS) $(DEVICESRCS)
+OBJS=$(patsubst %.c,obj/%.o,$(SRCS))
+
+CFLAGS=-I$(INCDIR) -I$(DEVICEDIR)/$(INCDIR) -mthumb -mcpu=$(CPU) -nostdlib -g -DCORE_CM7
+LDFLAGS=-T$(DEVICEDIR)/linker_script.ld -nostdlib
+
+CC=arm-none-eabi-gcc
+LD=arm-none-eabi-ld
+OPENOCD=openocd
+
+$(BINDIR)/$(APP): $(OBJS)
+ mkdir -p $(BINDIR)
+ $(LD) $^ -o $@ $(LDFLAGS)
+
+$(OBJDIR)/src/%.o: $(SRCDIR)/%.c
+ mkdir -p "$(OBJDIR)/src"
+ $(CC) -c $< -o $@ $(CFLAGS)
+
+$(OBJDIR)/$(DEVICEDIR)/%.o: $(DEVICEDIR)/%.c
+ mkdir -p "$(OBJDIR)/$(DEVICEDIR)"
+ $(CC) -c $< -o $@ $(CFLAGS)
+
+$(OBJDIR)/$(GENERALDIR)/%.o: $(GENERALDIR)/%.c
+ mkdir -p "$(OBJDIR)/$(GENERALDIR)"
+ $(CC) -c $< -o $@ $(CFLAGS)
+
+.PHONY: openocd flash clean
+openocd:
+ $(OPENOCD) -f interface/stlink.cfg -f target/$(TARGET).cfg
+
+flash: $(BINDIR)/$(APP)
+ $(OPENOCD) -f interface/stlink.cfg -f target/$(TARGET).cfg -c "program $(BINDIR)/$(APP) verify reset exit"
+
+clean:
+ rm -rf $(OBJDIR) $(BINDIR)
A => devices/general/startup.c +29 -0
@@ 1,29 @@
+#include <stdint.h>
+#include "defines.h"
+
+extern uint32_t _data_size, _bss_size, _data_loadaddr, _sdata, _sbss;
+void main(void);
+
+void reset_handler(void)
+{
+ // Copy .data from FLASH to SRAM
+ uint32_t data_size = (uint32_t)&_data_size;
+ uint8_t *flash_data = (uint8_t*) &_data_loadaddr;
+ uint8_t *sram_data = (uint8_t*) &_sdata;
+
+ for (uint32_t i = 0; i < data_size; i++)
+ {
+ sram_data[i] = flash_data[i];
+ }
+
+ // Zero-fill .bss section in SRAM
+ uint32_t bss_size = (uint32_t)&_bss_size;
+ uint8_t *bss = (uint8_t*) &_sbss;
+
+ for (uint32_t i = 0; i < bss_size; i++)
+ {
+ bss[i] = 0;
+ }
+
+ main();
+}
A => devices/stm32f401/include/defines.h +4 -0
@@ 1,4 @@
+#define SRAM_START (0x20000000U)
+#define SRAM_SIZE (96U * 1024U)
+#define SRAM_END (SRAM_START + SRAM_SIZE)
+#define STACK_POINTER_INIT_ADDRESS (SRAM_END)
A => devices/stm32f401/isr.c +189 -0
@@ 1,189 @@
+#include <stdint.h>
+#include "defines.h"
+#define ISR_VECTOR_SIZE_WORDS 101
+
+void reset_handler(void);
+void default_handler(void);
+void nmi_handler(void) __attribute__((weak, alias("default_handler")));
+void hard_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void bus_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void usage_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void svcall_handler(void) __attribute__((weak, alias("default_handler")));
+void debug_monitor_handler(void) __attribute__((weak, alias("default_handler")));
+void pendsv_handler(void) __attribute__((weak, alias("default_handler")));
+void systick_handler(void) __attribute__((weak, alias("default_handler")));
+void WWDG_handler(void) __attribute__((weak, alias("default_handler")));
+void PVD_handler(void) __attribute__((weak, alias("default_handler")));
+void TAMP_STAMP_handler(void) __attribute__((weak, alias("default_handler")));
+void RTC_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void FLASH_handler(void) __attribute__((weak, alias("default_handler")));
+void RCC_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI0_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI1_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI2_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI3_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI4_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
+void ADC_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI9_5_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_BRK_TIM9_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_UP_TIM10_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_TRG_COM_TIM11_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_CC_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM2_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM3_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM4_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C2_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C2_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI1_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI2_handler(void) __attribute__((weak, alias("default_handler")));
+void USART1_handler(void) __attribute__((weak, alias("default_handler")));
+void USART2_handler(void) __attribute__((weak, alias("default_handler")));
+void USART3_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI15_10_handler(void) __attribute__((weak, alias("default_handler")));
+void RTC_Alarm_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_FS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
+void SDIO_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM5_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_FS_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
+void USART6_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C3_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C3_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void FPU_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI4_handler(void) __attribute__((weak, alias("default_handler")));
+void SAI1_handler(void) __attribute__((weak, alias("default_handler")));
+void SAI2_handler(void) __attribute__((weak, alias("default_handler")));
+void QUADSPI_handler(void) __attribute__((weak, alias("default_handler")));
+void CEC_handler(void) __attribute__((weak, alias("default_handler")));
+void SPDIF_RX_handler(void) __attribute__((weak, alias("default_handler")));
+void FMPI2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void FMPI2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
+
+uint32_t isr_vector[ISR_VECTOR_SIZE_WORDS] __attribute__((section(".isr_vector"))) = {
+ STACK_POINTER_INIT_ADDRESS,
+ // arm cortex interrupts
+ (uint32_t)&reset_handler,
+ (uint32_t)&nmi_handler,
+ (uint32_t)&hard_fault_handler,
+ (uint32_t)&bus_fault_handler,
+ (uint32_t)&usage_fault_handler,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&svcall_handler,
+ (uint32_t)&debug_monitor_handler,
+ 0,
+ (uint32_t)&pendsv_handler,
+ (uint32_t)&systick_handler,
+ // device specific interrupts
+ (uint32_t)&WWDG_handler, /* Window WatchDog */
+ (uint32_t)&PVD_handler, /* PVD through EXTI Line detection */
+ (uint32_t)&TAMP_STAMP_handler, /* Tamper and TimeStamps through the EXTI line */
+ (uint32_t)&RTC_WKUP_handler, /* RTC Wakeup through the EXTI line */
+ (uint32_t)&FLASH_handler, /* FLASH */
+ (uint32_t)&RCC_handler, /* RCC */
+ (uint32_t)&EXTI0_handler, /* EXTI Line0 */
+ (uint32_t)&EXTI1_handler, /* EXTI Line1 */
+ (uint32_t)&EXTI2_handler, /* EXTI Line2 */
+ (uint32_t)&EXTI3_handler, /* EXTI Line3 */
+ (uint32_t)&EXTI4_handler, /* EXTI Line4 */
+ (uint32_t)&DMA1_Stream0_handler, /* DMA1 Stream 0 */
+ (uint32_t)&DMA1_Stream1_handler, /* DMA1 Stream 1 */
+ (uint32_t)&DMA1_Stream2_handler, /* DMA1 Stream 2 */
+ (uint32_t)&DMA1_Stream3_handler, /* DMA1 Stream 3 */
+ (uint32_t)&DMA1_Stream4_handler, /* DMA1 Stream 4 */
+ (uint32_t)&DMA1_Stream5_handler, /* DMA1 Stream 5 */
+ (uint32_t)&DMA1_Stream6_handler, /* DMA1 Stream 6 */
+ (uint32_t)&ADC_handler, /* ADC1, ADC2 and ADC3s */
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&EXTI9_5_handler, /* External Line[9:5]s */
+ (uint32_t)&TIM1_BRK_TIM9_handler, /* TIM1 Break and TIM9 */
+ (uint32_t)&TIM1_UP_TIM10_handler, /* TIM1 Update and TIM10 */
+ (uint32_t)&TIM1_TRG_COM_TIM11_handler, /* TIM1 Trigger and Commutation and TIM11 */
+ (uint32_t)&TIM1_CC_handler, /* TIM1 Capture Compare */
+ (uint32_t)&TIM2_handler, /* TIM2 */
+ (uint32_t)&TIM3_handler, /* TIM3 */
+ (uint32_t)&TIM4_handler, /* TIM4 */
+ (uint32_t)&I2C1_EV_handler, /* I2C1 Event */
+ (uint32_t)&I2C1_ER_handler, /* I2C1 Error */
+ (uint32_t)&I2C2_EV_handler, /* I2C2 Event */
+ (uint32_t)&I2C2_ER_handler, /* I2C2 Error */
+ (uint32_t)&SPI1_handler, /* SPI1 */
+ (uint32_t)&SPI2_handler, /* SPI2 */
+ (uint32_t)&USART1_handler, /* USART1 */
+ (uint32_t)&USART2_handler, /* USART2 */
+ 0,
+ (uint32_t)&EXTI15_10_handler, /* External Line[15:10]s */
+ (uint32_t)&EXTI17_RTC_Alarm_handler, /* RTC Alarm (A and B) through EXTI Line */
+ (uint32_t)&EXTI18_OTG_FS_WKUP_handler, /* USB OTG FS Wakeup through EXTI line */
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&DMA1_Stream7_handler, /* DMA1 Stream7 */
+ 0,
+ (uint32_t)&SDIO_handler, /* SDIO */
+ (uint32_t)&TIM5_handler, /* TIM5 */
+ (uint32_t)&SPI3_handler, /* SPI3 */
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&DMA2_Stream0_handler, /* DMA2 Stream 0 */
+ (uint32_t)&DMA2_Stream1_handler, /* DMA2 Stream 1 */
+ (uint32_t)&DMA2_Stream2_handler, /* DMA2 Stream 2 */
+ (uint32_t)&DMA2_Stream3_handler, /* DMA2 Stream 3 */
+ (uint32_t)&DMA2_Stream4_handler, /* DMA2 Stream 4 */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&OTG_FS_handler, /* USB OTG FS */
+ (uint32_t)&DMA2_Stream5_handler, /* DMA2 Stream 5 */
+ (uint32_t)&DMA2_Stream6_handler, /* DMA2 Stream 6 */
+ (uint32_t)&DMA2_Stream7_handler, /* DMA2 Stream 7 */
+ (uint32_t)&USART6_handler, /* USART6 */
+ (uint32_t)&I2C3_EV_handler, /* I2C3 event */
+ (uint32_t)&I2C3_ER_handler, /* I2C3 error */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&FPU_handler, /* FPU */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&SPI4_handler /* SPI4 */
+};
+
+void default_handler(void)
+{
+ while(1);
+}
A => devices/stm32f401/linker_script.ld +53 -0
@@ 1,53 @@
+MEMORY
+{
+ FLASH (rx): ORIGIN = 0x08000000, LENGTH = 512K
+ SRAM (rwx): ORIGIN = 0x20000000, LENGTH = 96K
+}
+
+SECTIONS
+{
+ .isr_vector :
+ {
+ KEEP(*(.isr_vector))
+ } >FLASH
+
+ .text :
+ {
+ . = ALIGN(4);
+
+ *(.text)
+ *(.rodata)
+
+ . = ALIGN(4);
+ _etext = .;
+ } >FLASH
+
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .;
+
+ *(.data)
+
+ . = ALIGN(4);
+ _edata = .;
+ } >SRAM AT> FLASH
+
+ _data_size = _edata - _sdata;
+ _data_loadaddr = LOADADDR(.data);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ _sbss = .;
+
+ *(.bss)
+
+ . = ALIGN(4);
+ _ebss = .;
+ } >SRAM
+
+ _bss_size = _ebss - _sbss;
+}
+
+ENTRY(reset_handler)
A => devices/stm32f407/include/defines.h +4 -0
@@ 1,4 @@
+#define SRAM_START (0x20000000U)
+#define SRAM_SIZE (128U * 1024U)
+#define SRAM_END (SRAM_START + SRAM_SIZE)
+#define STACK_POINTER_INIT_ADDRESS (SRAM_END)
A => devices/stm32f407/isr.c +212 -0
@@ 1,212 @@
+#include <stdint.h>
+#include "defines.h"
+#define ISR_VECTOR_SIZE_WORDS 114
+
+void reset_handler(void);
+void default_handler(void);
+void nmi_handler(void) __attribute__((weak, alias("default_handler")));
+void hard_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void bus_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void usage_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void svcall_handler(void) __attribute__((weak, alias("default_handler")));
+void debug_monitor_handler(void) __attribute__((weak, alias("default_handler")));
+void pendsv_handler(void) __attribute__((weak, alias("default_handler")));
+void systick_handler(void) __attribute__((weak, alias("default_handler")));
+void WWDG_handler(void) __attribute__((weak, alias("default_handler")));
+void PVD_handler(void) __attribute__((weak, alias("default_handler")));
+void TAMP_STAMP_handler(void) __attribute__((weak, alias("default_handler")));
+void RTC_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void FLASH_handler(void) __attribute__((weak, alias("default_handler")));
+void RCC_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI0_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI1_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI2_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI3_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI4_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
+void ADC_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN1_TX_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN1_RX0_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN1_RX1_handler(void) __attribute__((weak, alias("default_handler")));
+void SCE_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI9_5_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_BRK_TIM9_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_UP_TIM10_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_TRG_COM_TIM11_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_CC_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM2_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM3_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM4_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C2_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C2_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI1_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI2_handler(void) __attribute__((weak, alias("default_handler")));
+void USART1_handler(void) __attribute__((weak, alias("default_handler")));
+void USART2_handler(void) __attribute__((weak, alias("default_handler")));
+void USART3_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI15_10_handler(void) __attribute__((weak, alias("default_handler")));
+void RTC_Alarm_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_FS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_BRK_TIM12_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_UP_TIM13_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_TRG_COM_TIM14_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_CC_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
+void FSMC_handler(void) __attribute__((weak, alias("default_handler")));
+void SDIO_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM5_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI3_handler(void) __attribute__((weak, alias("default_handler")));
+void UART4_handler(void) __attribute__((weak, alias("default_handler")));
+void UART5_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM6_DAC_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM7_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
+void ETH_handler(void) __attribute__((weak, alias("default_handler")));
+void ETH_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_TX_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_RX0_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_RX1_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_SCE_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_FS_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
+void USART6_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C3_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C3_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_EP1_OUT_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_EP1_IN_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_handler(void) __attribute__((weak, alias("default_handler")));
+void DCMI_handler(void) __attribute__((weak, alias("default_handler")));
+void CRYP_handler(void) __attribute__((weak, alias("default_handler")));
+void HASH_RNG_handler(void) __attribute__((weak, alias("default_handler")));
+void FPU_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI4_handler(void) __attribute__((weak, alias("default_handler")));
+void SAI1_handler(void) __attribute__((weak, alias("default_handler")));
+void SAI2_handler(void) __attribute__((weak, alias("default_handler")));
+void QUADSPI_handler(void) __attribute__((weak, alias("default_handler")));
+void CEC_handler(void) __attribute__((weak, alias("default_handler")));
+void SPDIF_RX_handler(void) __attribute__((weak, alias("default_handler")));
+void FMPI2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void FMPI2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
+
+uint32_t isr_vector[ISR_VECTOR_SIZE_WORDS] __attribute__((section(".isr_vector"))) = {
+ STACK_POINTER_INIT_ADDRESS,
+ // arm cortex interrupts
+ (uint32_t)&reset_handler,
+ (uint32_t)&nmi_handler,
+ (uint32_t)&hard_fault_handler,
+ (uint32_t)&bus_fault_handler,
+ (uint32_t)&usage_fault_handler,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&svcall_handler,
+ (uint32_t)&debug_monitor_handler,
+ 0,
+ (uint32_t)&pendsv_handler,
+ (uint32_t)&systick_handler,
+ // device specific interrupts
+ (uint32_t)&WWDG_handler, /* Window WatchDog */
+ (uint32_t)&PVD_handler, /* PVD through EXTI Line detection */
+ (uint32_t)&TAMP_STAMP_handler, /* Tamper and TimeStamps through the EXTI line */
+ (uint32_t)&RTC_WKUP_handler, /* RTC Wakeup through the EXTI line */
+ (uint32_t)&FLASH_handler, /* FLASH */
+ (uint32_t)&RCC_handler, /* RCC */
+ (uint32_t)&EXTI0_handler, /* EXTI Line0 */
+ (uint32_t)&EXTI1_handler, /* EXTI Line1 */
+ (uint32_t)&EXTI2_handler, /* EXTI Line2 */
+ (uint32_t)&EXTI3_handler, /* EXTI Line3 */
+ (uint32_t)&EXTI4_handler, /* EXTI Line4 */
+ (uint32_t)&DMA1_Stream0_handler, /* DMA1 Stream 0 */
+ (uint32_t)&DMA1_Stream1_handler, /* DMA1 Stream 1 */
+ (uint32_t)&DMA1_Stream2_handler, /* DMA1 Stream 2 */
+ (uint32_t)&DMA1_Stream3_handler, /* DMA1 Stream 3 */
+ (uint32_t)&DMA1_Stream4_handler, /* DMA1 Stream 4 */
+ (uint32_t)&DMA1_Stream5_handler, /* DMA1 Stream 5 */
+ (uint32_t)&DMA1_Stream6_handler, /* DMA1 Stream 6 */
+ (uint32_t)&ADC_handler, /* ADC1, ADC2 and ADC3s */
+ (uint32_t)&CAN1_TX_handler, /* CAN1 TX */
+ (uint32_t)&CAN1_RX0_handler, /* CAN1 RX0 */
+ (uint32_t)&CAN1_RX1_handler, /* CAN1 RX1 */
+ (uint32_t)&SCE_handler, /* CAN1 SCE */
+ (uint32_t)&EXTI9_5_handler, /* External Line[9:5]s */
+ (uint32_t)&TIM1_BRK_TIM9_handler, /* TIM1 Break and TIM9 */
+ (uint32_t)&TIM1_UP_TIM10_handler, /* TIM1 Update and TIM10 */
+ (uint32_t)&TIM1_TRG_COM_TIM11_handler, /* TIM1 Trigger and Commutation and TIM11 */
+ (uint32_t)&TIM1_CC_handler, /* TIM1 Capture Compare */
+ (uint32_t)&TIM2_handler, /* TIM2 */
+ (uint32_t)&TIM3_handler, /* TIM3 */
+ (uint32_t)&TIM4_handler, /* TIM4 */
+ (uint32_t)&I2C1_EV_handler, /* I2C1 Event */
+ (uint32_t)&I2C1_ER_handler, /* I2C1 Error */
+ (uint32_t)&I2C2_EV_handler, /* I2C2 Event */
+ (uint32_t)&I2C2_ER_handler, /* I2C2 Error */
+ (uint32_t)&SPI1_handler, /* SPI1 */
+ (uint32_t)&SPI2_handler, /* SPI2 */
+ (uint32_t)&USART1_handler, /* USART1 */
+ (uint32_t)&USART2_handler, /* USART2 */
+ (uint32_t)&USART3_handler, /* USART3 */
+ (uint32_t)&EXTI15_10_handler, /* External Line[15:10]s */
+ (uint32_t)&RTC_Alarm_handler, /* RTC Alarm (A and B) through EXTI Line */
+ (uint32_t)&OTG_FS_WKUP_handler, /* USB OTG FS Wakeup through EXTI line */
+ (uint32_t)&TIM8_BRK_TIM12_handler, /* TIM8 Break and TIM12 */
+ (uint32_t)&TIM8_UP_TIM13_handler, /* TIM8 Update and TIM13 */
+ (uint32_t)&TIM8_TRG_COM_TIM14_handler, /* TIM8 Trigger and Commutation and TIM14 */
+ (uint32_t)&TIM8_CC_handler, /* TIM8 Capture Compare */
+ (uint32_t)&DMA1_Stream7_handler, /* DMA1 Stream7 */
+ (uint32_t)&FSMC_handler, /* FMC */
+ (uint32_t)&SDIO_handler, /* SDIO */
+ (uint32_t)&TIM5_handler, /* TIM5 */
+ (uint32_t)&SPI3_handler, /* SPI3 */
+ (uint32_t)&UART4_handler, /* UART4 */
+ (uint32_t)&UART5_handler, /* UART5 */
+ (uint32_t)&TIM6_DAC_handler, /* TIM6 and DAC1&2 underrun errors */
+ (uint32_t)&TIM7_handler, /* TIM7 */
+ (uint32_t)&DMA2_Stream0_handler, /* DMA2 Stream 0 */
+ (uint32_t)&DMA2_Stream1_handler, /* DMA2 Stream 1 */
+ (uint32_t)&DMA2_Stream2_handler, /* DMA2 Stream 2 */
+ (uint32_t)&DMA2_Stream3_handler, /* DMA2 Stream 3 */
+ (uint32_t)&DMA2_Stream4_handler, /* DMA2 Stream 4 */
+ (uint32_t)Ð_handler,
+ (uint32_t)Ð_WKUP_handler,
+ (uint32_t)&CAN2_TX_handler, /* CAN2 TX */
+ (uint32_t)&CAN2_RX0_handler, /* CAN2 RX0 */
+ (uint32_t)&CAN2_RX1_handler, /* CAN2 RX1 */
+ (uint32_t)&CAN2_SCE_handler, /* CAN2 SCE */
+ (uint32_t)&OTG_FS_handler, /* USB OTG FS */
+ (uint32_t)&DMA2_Stream5_handler, /* DMA2 Stream 5 */
+ (uint32_t)&DMA2_Stream6_handler, /* DMA2 Stream 6 */
+ (uint32_t)&DMA2_Stream7_handler, /* DMA2 Stream 7 */
+ (uint32_t)&USART6_handler, /* USART6 */
+ (uint32_t)&I2C3_EV_handler, /* I2C3 event */
+ (uint32_t)&I2C3_ER_handler, /* I2C3 error */
+ (uint32_t)&OTG_HS_EP1_OUT_handler, /* USB OTG HS End Point 1 Out */
+ (uint32_t)&OTG_HS_EP1_IN_handler, /* USB OTG HS End Point 1 In */
+ (uint32_t)&OTG_HS_WKUP_handler, /* USB OTG HS Wakeup through EXTI */
+ (uint32_t)&OTG_HS_handler, /* USB OTG HS */
+ (uint32_t)&DCMI_handler, /* DCMI */
+ (uint32_t)&CRYP_handler, /* CRYP crypto global interrupt */
+ (uint32_t)&HASH_RNG_handler, /* Hash and Rng global interrupt */
+ (uint32_t)&FPU_handler /* FPU */
+};
+
+void default_handler(void)
+{
+ while(1);
+}
A => devices/stm32f407/linker_script.ld +53 -0
@@ 1,53 @@
+MEMORY
+{
+ FLASH (rx): ORIGIN = 0x08000000, LENGTH = 1024K
+ SRAM (rwx): ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+SECTIONS
+{
+ .isr_vector :
+ {
+ KEEP(*(.isr_vector))
+ } >FLASH
+
+ .text :
+ {
+ . = ALIGN(4);
+
+ *(.text)
+ *(.rodata)
+
+ . = ALIGN(4);
+ _etext = .;
+ } >FLASH
+
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .;
+
+ *(.data)
+
+ . = ALIGN(4);
+ _edata = .;
+ } >SRAM AT> FLASH
+
+ _data_size = _edata - _sdata;
+ _data_loadaddr = LOADADDR(.data);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ _sbss = .;
+
+ *(.bss)
+
+ . = ALIGN(4);
+ _ebss = .;
+ } >SRAM
+
+ _bss_size = _ebss - _sbss;
+}
+
+ENTRY(reset_handler)
A => devices/stm32f446/include/defines.h +4 -0
@@ 1,4 @@
+#define SRAM_START (0x20000000U)
+#define SRAM_SIZE (128U * 1024U)
+#define SRAM_END (SRAM_START + SRAM_SIZE)
+#define STACK_POINTER_INIT_ADDRESS (SRAM_END)
A => devices/stm32f446/isr.c +223 -0
@@ 1,223 @@
+#include <stdint.h>
+#include "defines.h"
+#define ISR_VECTOR_SIZE_WORDS 115
+
+void reset_handler(void);
+void default_handler(void);
+void nmi_handler(void) __attribute__((weak, alias("default_handler")));
+void hard_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void bus_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void usage_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void svcall_handler(void) __attribute__((weak, alias("default_handler")));
+void debug_monitor_handler(void) __attribute__((weak, alias("default_handler")));
+void pendsv_handler(void) __attribute__((weak, alias("default_handler")));
+void systick_handler(void) __attribute__((weak, alias("default_handler")));
+void WWDG_handler(void) __attribute__((weak, alias("default_handler")));
+void PVD_handler(void) __attribute__((weak, alias("default_handler")));
+void TAMP_STAMP_handler(void) __attribute__((weak, alias("default_handler")));
+void RTC_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void FLASH_handler(void) __attribute__((weak, alias("default_handler")));
+void RCC_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI0_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI1_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI2_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI3_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI4_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
+void ADC_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN1_TX_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN1_RX0_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN1_RX1_handler(void) __attribute__((weak, alias("default_handler")));
+void SCE_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI9_5_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_BRK_TIM9_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_UP_TIM10_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_TRG_COM_TIM11_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM1_CC_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM2_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM3_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM4_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C2_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C2_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI1_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI2_handler(void) __attribute__((weak, alias("default_handler")));
+void USART1_handler(void) __attribute__((weak, alias("default_handler")));
+void USART2_handler(void) __attribute__((weak, alias("default_handler")));
+void USART3_handler(void) __attribute__((weak, alias("default_handler")));
+void EXTI15_10_handler(void) __attribute__((weak, alias("default_handler")));
+void RTC_Alarm_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_FS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_BRK_TIM12_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_UP_TIM13_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_TRG_COM_TIM14_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM8_CC_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA1_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
+void FMC_handler(void) __attribute__((weak, alias("default_handler")));
+void SDIO_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM5_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI3_handler(void) __attribute__((weak, alias("default_handler")));
+void UART4_handler(void) __attribute__((weak, alias("default_handler")));
+void UART5_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM6_DAC_handler(void) __attribute__((weak, alias("default_handler")));
+void TIM7_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_TX_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_RX0_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_RX1_handler(void) __attribute__((weak, alias("default_handler")));
+void CAN2_SCE_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_FS_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
+void DMA2_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
+void USART6_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C3_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void I2C3_ER_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_EP1_OUT_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_EP1_IN_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
+void OTG_HS_handler(void) __attribute__((weak, alias("default_handler")));
+void DCMI_handler(void) __attribute__((weak, alias("default_handler")));
+void FPU_handler(void) __attribute__((weak, alias("default_handler")));
+void SPI4_handler(void) __attribute__((weak, alias("default_handler")));
+void SAI1_handler(void) __attribute__((weak, alias("default_handler")));
+void SAI2_handler(void) __attribute__((weak, alias("default_handler")));
+void QUADSPI_handler(void) __attribute__((weak, alias("default_handler")));
+void CEC_handler(void) __attribute__((weak, alias("default_handler")));
+void SPDIF_RX_handler(void) __attribute__((weak, alias("default_handler")));
+void FMPI2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
+void FMPI2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
+
+uint32_t isr_vector[ISR_VECTOR_SIZE_WORDS] __attribute__((section(".isr_vector"))) = {
+ STACK_POINTER_INIT_ADDRESS,
+ // arm cortex interrupts
+ (uint32_t)&reset_handler,
+ (uint32_t)&nmi_handler,
+ (uint32_t)&hard_fault_handler,
+ (uint32_t)&bus_fault_handler,
+ (uint32_t)&usage_fault_handler,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&svcall_handler,
+ (uint32_t)&debug_monitor_handler,
+ 0,
+ (uint32_t)&pendsv_handler,
+ (uint32_t)&systick_handler,
+ // device specific interrupts
+ (uint32_t)&WWDG_handler, /* Window WatchDog */
+ (uint32_t)&PVD_handler, /* PVD through EXTI Line detection */
+ (uint32_t)&TAMP_STAMP_handler, /* Tamper and TimeStamps through the EXTI line */
+ (uint32_t)&RTC_WKUP_handler, /* RTC Wakeup through the EXTI line */
+ (uint32_t)&FLASH_handler, /* FLASH */
+ (uint32_t)&RCC_handler, /* RCC */
+ (uint32_t)&EXTI0_handler, /* EXTI Line0 */
+ (uint32_t)&EXTI1_handler, /* EXTI Line1 */
+ (uint32_t)&EXTI2_handler, /* EXTI Line2 */
+ (uint32_t)&EXTI3_handler, /* EXTI Line3 */
+ (uint32_t)&EXTI4_handler, /* EXTI Line4 */
+ (uint32_t)&DMA1_Stream0_handler, /* DMA1 Stream 0 */
+ (uint32_t)&DMA1_Stream1_handler, /* DMA1 Stream 1 */
+ (uint32_t)&DMA1_Stream2_handler, /* DMA1 Stream 2 */
+ (uint32_t)&DMA1_Stream3_handler, /* DMA1 Stream 3 */
+ (uint32_t)&DMA1_Stream4_handler, /* DMA1 Stream 4 */
+ (uint32_t)&DMA1_Stream5_handler, /* DMA1 Stream 5 */
+ (uint32_t)&DMA1_Stream6_handler, /* DMA1 Stream 6 */
+ (uint32_t)&ADC_handler, /* ADC1, ADC2 and ADC3s */
+ (uint32_t)&CAN1_TX_handler, /* CAN1 TX */
+ (uint32_t)&CAN1_RX0_handler, /* CAN1 RX0 */
+ (uint32_t)&CAN1_RX1_handler, /* CAN1 RX1 */
+ (uint32_t)&SCE_handler, /* CAN1 SCE */
+ (uint32_t)&EXTI9_5_handler, /* External Line[9:5]s */
+ (uint32_t)&TIM1_BRK_TIM9_handler, /* TIM1 Break and TIM9 */
+ (uint32_t)&TIM1_UP_TIM10_handler, /* TIM1 Update and TIM10 */
+ (uint32_t)&TIM1_TRG_COM_TIM11_handler, /* TIM1 Trigger and Commutation and TIM11 */
+ (uint32_t)&TIM1_CC_handler, /* TIM1 Capture Compare */
+ (uint32_t)&TIM2_handler, /* TIM2 */
+ (uint32_t)&TIM3_handler, /* TIM3 */
+ (uint32_t)&TIM4_handler, /* TIM4 */
+ (uint32_t)&I2C1_EV_handler, /* I2C1 Event */
+ (uint32_t)&I2C1_ER_handler, /* I2C1 Error */
+ (uint32_t)&I2C2_EV_handler, /* I2C2 Event */
+ (uint32_t)&I2C2_ER_handler, /* I2C2 Error */
+ (uint32_t)&SPI1_handler, /* SPI1 */
+ (uint32_t)&SPI2_handler, /* SPI2 */
+ (uint32_t)&USART1_handler, /* USART1 */
+ (uint32_t)&USART2_handler, /* USART2 */
+ (uint32_t)&USART3_handler, /* USART3 */
+ (uint32_t)&EXTI15_10_handler, /* External Line[15:10]s */
+ (uint32_t)&RTC_Alarm_handler, /* RTC Alarm (A and B) through EXTI Line */
+ (uint32_t)&OTG_FS_WKUP_handler, /* USB OTG FS Wakeup through EXTI line */
+ (uint32_t)&TIM8_BRK_TIM12_handler, /* TIM8 Break and TIM12 */
+ (uint32_t)&TIM8_UP_TIM13_handler, /* TIM8 Update and TIM13 */
+ (uint32_t)&TIM8_TRG_COM_TIM14_handler, /* TIM8 Trigger and Commutation and TIM14 */
+ (uint32_t)&TIM8_CC_handler, /* TIM8 Capture Compare */
+ (uint32_t)&DMA1_Stream7_handler, /* DMA1 Stream7 */
+ (uint32_t)&FMC_handler, /* FMC */
+ (uint32_t)&SDIO_handler, /* SDIO */
+ (uint32_t)&TIM5_handler, /* TIM5 */
+ (uint32_t)&SPI3_handler, /* SPI3 */
+ (uint32_t)&UART4_handler, /* UART4 */
+ (uint32_t)&UART5_handler, /* UART5 */
+ (uint32_t)&TIM6_DAC_handler, /* TIM6 and DAC1&2 underrun errors */
+ (uint32_t)&TIM7_handler, /* TIM7 */
+ (uint32_t)&DMA2_Stream0_handler, /* DMA2 Stream 0 */
+ (uint32_t)&DMA2_Stream1_handler, /* DMA2 Stream 1 */
+ (uint32_t)&DMA2_Stream2_handler, /* DMA2 Stream 2 */
+ (uint32_t)&DMA2_Stream3_handler, /* DMA2 Stream 3 */
+ (uint32_t)&DMA2_Stream4_handler, /* DMA2 Stream 4 */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&CAN2_TX_handler, /* CAN2 TX */
+ (uint32_t)&CAN2_RX0_handler, /* CAN2 RX0 */
+ (uint32_t)&CAN2_RX1_handler, /* CAN2 RX1 */
+ (uint32_t)&CAN2_SCE_handler, /* CAN2 SCE */
+ (uint32_t)&OTG_FS_handler, /* USB OTG FS */
+ (uint32_t)&DMA2_Stream5_handler, /* DMA2 Stream 5 */
+ (uint32_t)&DMA2_Stream6_handler, /* DMA2 Stream 6 */
+ (uint32_t)&DMA2_Stream7_handler, /* DMA2 Stream 7 */
+ (uint32_t)&USART6_handler, /* USART6 */
+ (uint32_t)&I2C3_EV_handler, /* I2C3 event */
+ (uint32_t)&I2C3_ER_handler, /* I2C3 error */
+ (uint32_t)&OTG_HS_EP1_OUT_handler, /* USB OTG HS End Point 1 Out */
+ (uint32_t)&OTG_HS_EP1_IN_handler, /* USB OTG HS End Point 1 In */
+ (uint32_t)&OTG_HS_WKUP_handler, /* USB OTG HS Wakeup through EXTI */
+ (uint32_t)&OTG_HS_handler, /* USB OTG HS */
+ (uint32_t)&DCMI_handler, /* DCMI */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&FPU_handler, /* FPU */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&SPI4_handler, /* SPI4 */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&SAI1_handler, /* SAI1 */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ 0 , /* Reserved */
+ (uint32_t)&SAI2_handler, /* SAI2 */
+ (uint32_t)&QUADSPI_handler, /* QuadSPI */
+ (uint32_t)&CEC_handler, /* CEC */
+ (uint32_t)&SPDIF_RX_handler, /* SPDIF RX */
+ (uint32_t)&FMPI2C1_EV_handler, /* FMPI2C 1 Event */
+ (uint32_t)&FMPI2C1_ER_handler /* FMPI2C 1 Error */
+};
+
+void default_handler(void)
+{
+ while(1);
+}
A => devices/stm32f446/linker_script.ld +53 -0
@@ 1,53 @@
+MEMORY
+{
+ FLASH (rx): ORIGIN = 0x08000000, LENGTH = 512K
+ SRAM (rwx): ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+SECTIONS
+{
+ .isr_vector :
+ {
+ KEEP(*(.isr_vector))
+ } >FLASH
+
+ .text :
+ {
+ . = ALIGN(4);
+
+ *(.text)
+ *(.rodata)
+
+ . = ALIGN(4);
+ _etext = .;
+ } >FLASH
+
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .;
+
+ *(.data)
+
+ . = ALIGN(4);
+ _edata = .;
+ } >SRAM AT> FLASH
+
+ _data_size = _edata - _sdata;
+ _data_loadaddr = LOADADDR(.data);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ _sbss = .;
+
+ *(.bss)
+
+ . = ALIGN(4);
+ _ebss = .;
+ } >SRAM
+
+ _bss_size = _ebss - _sbss;
+}
+
+ENTRY(reset_handler)
A => devices/stm32h747/README.md +10 -0
@@ 1,10 @@
+This chip is quite special in comparison
+to the other chips. This one has two
+CPUs inside of it. Currently the
+linker script here and, isr vector
+and such are meant mainly for the CM7,
+assuming the default values of BCM7_ADD0,
+using the 512K AXI SRAM.
+
+I have yet to decide how to handle both the
+CPUs at one time in this project structure.
A => devices/stm32h747/include/defines.h +4 -0
@@ 1,4 @@
+#define SRAM_START (0x24000000U)
+#define SRAM_SIZE (512U * 1024U)
+#define SRAM_END (SRAM_START + SRAM_SIZE)
+#define STACK_POINTER_INIT_ADDRESS (SRAM_END)
A => devices/stm32h747/isr.c +332 -0
@@ 1,332 @@
+#include <stdint.h>
+#include "defines.h"
+#define ISR_VECTOR_SIZE_WORDS 166
+
+void reset_handler(void);
+void default_handler(void);
+void nmi_handler(void) __attribute__((weak, alias("default_handler")));
+void hard_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void bus_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void usage_fault_handler(void) __attribute__((weak, alias("default_handler")));
+void svcall_handler(void) __attribute__((weak, alias("default_handler")));
+void debug_monitor_handler(void) __attribute__((weak, alias("default_handler")));
+void pendsv_handler(void) __attribute__((weak, alias("default_handler")));
+void systick_handler(void) __attribute__((weak, alias("default_handler")));
+void wwdg_handler(void) __attribute__((weak, alias("default_handler"))); /* window watchdog */
+void pvd_pvm_handler(void) __attribute__((weak, alias("default_handler"))); /* pvd through exti line detection */
+void rtc_tamp_stamp_css_lse_handler(void) __attribute__((weak, alias("default_handler"))); /* tamper and timestamps through the exti line */
+void rtc_wkup_handler(void) __attribute__((weak, alias("default_handler"))); /* rtc wakeup through the exti line */
+void flash_handler(void) __attribute__((weak, alias("default_handler"))); /* flash */
+void rcc_handler(void) __attribute__((weak, alias("default_handler"))); /* rcc */
+void exti0_handler(void) __attribute__((weak, alias("default_handler"))); /* exti line0 */
+void exti1_handler(void) __attribute__((weak, alias("default_handler"))); /* exti line1 */
+void exti2_handler(void) __attribute__((weak, alias("default_handler"))); /* exti line2 */
+void exti3_handler(void) __attribute__((weak, alias("default_handler"))); /* exti line3 */
+void exti4_handler(void) __attribute__((weak, alias("default_handler"))); /* exti line4 */
+void dma1_stream0_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 0 */
+void dma1_stream1_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 1 */
+void dma1_stream2_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 2 */
+void dma1_stream3_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 3 */
+void dma1_stream4_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 4 */
+void dma1_stream5_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 5 */
+void dma1_stream6_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream 6 */
+void adc_1_2_handler(void) __attribute__((weak, alias("default_handler"))); /* adc1, adc2 and adc3s */
+void fccan1_it0_handler(void) __attribute__((weak, alias("default_handler")));
+void fccan2_it0_handler(void) __attribute__((weak, alias("default_handler")));
+void fccan1_it1_handler(void) __attribute__((weak, alias("default_handler")));
+void fccan2_it1_handler(void) __attribute__((weak, alias("default_handler")));
+void exti9_5_handler(void) __attribute__((weak, alias("default_handler"))); /* external line[9:5]s */
+void tim1_brk_handler(void) __attribute__((weak, alias("default_handler"))); /* tim1 break and tim9 */
+void tim1_up_handler(void) __attribute__((weak, alias("default_handler"))); /* tim1 update and tim10 */
+void tim1_trg_com_handler(void) __attribute__((weak, alias("default_handler"))); /* tim1 trigger and commutation and tim11 */
+void tim_cc_handler(void) __attribute__((weak, alias("default_handler"))); /* tim1 capture compare */
+void tim2_handler(void) __attribute__((weak, alias("default_handler"))); /* tim2 */
+void tim3_handler(void) __attribute__((weak, alias("default_handler"))); /* tim3 */
+void tim4_handler(void) __attribute__((weak, alias("default_handler"))); /* tim4 */
+void i2c1_ev_handler(void) __attribute__((weak, alias("default_handler"))); /* i2c1 event */
+void i2c1_er_handler(void) __attribute__((weak, alias("default_handler"))); /* i2c1 error */
+void i2c2_ev_handler(void) __attribute__((weak, alias("default_handler"))); /* i2c2 event */
+void i2c2_er_handler(void) __attribute__((weak, alias("default_handler"))); /* i2c2 error */
+void spi1_handler(void) __attribute__((weak, alias("default_handler"))); /* spi1 */
+void spi2_handler(void) __attribute__((weak, alias("default_handler"))); /* spi2 */
+void usart1_handler(void) __attribute__((weak, alias("default_handler"))); /* usart1 */
+void usart2_handler(void) __attribute__((weak, alias("default_handler"))); /* usart2 */
+void usart3_handler(void) __attribute__((weak, alias("default_handler"))); /* usart3 */
+void exti15_10_handler(void) __attribute__((weak, alias("default_handler"))); /* external line[15:10]s */
+void rtc_alarm_handler(void) __attribute__((weak, alias("default_handler"))); /* rtc alarm (a and b) through exti line */
+void tim8_brk_tim12_handler(void) __attribute__((weak, alias("default_handler"))); /* tim8 break and tim12 */
+void tim8_up_tim13_handler(void) __attribute__((weak, alias("default_handler"))); /* tim8 update and tim13 */
+void tim8_trg_com_tim14_handler(void) __attribute__((weak, alias("default_handler"))); /* tim8 trigger and commutation and tim14 */
+void tim8_cc_handler(void) __attribute__((weak, alias("default_handler"))); /* tim8 capture compare */
+void dma1_stream7_handler(void) __attribute__((weak, alias("default_handler"))); /* dma1 stream7 */
+void fmc_handler(void) __attribute__((weak, alias("default_handler"))); /* fmc */
+void sdmmc1_handler(void) __attribute__((weak, alias("default_handler")));
+void tim5_handler(void) __attribute__((weak, alias("default_handler"))); /* tim5 */
+void spi3_handler(void) __attribute__((weak, alias("default_handler"))); /* spi3 */
+void uart4_handler(void) __attribute__((weak, alias("default_handler"))); /* uart4 */
+void uart5_handler(void) __attribute__((weak, alias("default_handler"))); /* uart5 */
+void tim6_dac_handler(void) __attribute__((weak, alias("default_handler"))); /* tim6 and dac1&2 underrun errors */
+void tim7_handler(void) __attribute__((weak, alias("default_handler"))); /* tim7 */
+void dma2_stream0_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 0 */
+void dma2_stream1_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 1 */
+void dma2_stream2_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 2 */
+void dma2_stream3_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 3 */
+void dma2_stream4_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 4 */
+void eth_handler(void) __attribute__((weak, alias("default_handler")));
+void eth_wkup_handler(void) __attribute__((weak, alias("default_handler")));
+void fdcan_cal_handler(void) __attribute__((weak, alias("default_handler")));
+void dma2_stream5_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 5 */
+void dma2_stream6_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 6 */
+void dma2_stream7_handler(void) __attribute__((weak, alias("default_handler"))); /* dma2 stream 7 */
+void usart6_handler(void) __attribute__((weak, alias("default_handler"))); /* usart6 */
+void i2c3_ev_handler(void) __attribute__((weak, alias("default_handler"))); /* i2c3 event */
+void i2c3_er_handler(void) __attribute__((weak, alias("default_handler"))); /* i2c3 error */
+void otg_hs_ep1_out_handler(void) __attribute__((weak, alias("default_handler"))); /* usb otg hs end point 1 out */
+void otg_hs_ep1_in_handler(void) __attribute__((weak, alias("default_handler"))); /* usb otg hs end point 1 in */
+void otg_hs_wkup_handler(void) __attribute__((weak, alias("default_handler"))); /* usb otg hs wakeup through exti */
+void otg_hs_handler(void) __attribute__((weak, alias("default_handler"))); /* usb otg hs */
+void dcmi_handler(void) __attribute__((weak, alias("default_handler"))); /* dcmi */
+void cryp_handler(void) __attribute__((weak, alias("default_handler")));
+void hash_rng_handler(void) __attribute__((weak, alias("default_handler")));
+void fpu_handler(void) __attribute__((weak, alias("default_handler"))); /* fpu */
+void uart7_handler(void) __attribute__((weak, alias("default_handler")));
+void uart8_handler(void) __attribute__((weak, alias("default_handler")));
+void spi4_handler(void) __attribute__((weak, alias("default_handler"))); /* spi4 */
+void spi5_handler(void) __attribute__((weak, alias("default_handler"))); /* spi5 */
+void spi6_handler(void) __attribute__((weak, alias("default_handler"))); /* spi6 */
+void sai1_handler(void) __attribute__((weak, alias("default_handler"))); /* sai1 */
+void ltdc_handler(void) __attribute__((weak, alias("default_handler")));
+void ltdc_er_handler(void) __attribute__((weak, alias("default_handler")));
+void dma2d_handler(void) __attribute__((weak, alias("default_handler")));
+void sai2_handler(void) __attribute__((weak, alias("default_handler")));
+void quadspi_handler(void) __attribute__((weak, alias("default_handler"))); /* quadspi */
+void lptim1_handler(void) __attribute__((weak, alias("default_handler"))); /* cec */
+void cec_handler(void) __attribute__((weak, alias("default_handler"))); /* cec */
+void i2c4_ev_handler(void) __attribute__((weak, alias("default_handler")));
+void i2c4_er_handler(void) __attribute__((weak, alias("default_handler")));
+void spdif_handler(void) __attribute__((weak, alias("default_handler"))); /* spdif rx */
+void otg_fs_ep1_out_handler(void) __attribute__((weak, alias("default_handler")));
+void otg_fs_ep1_in_handler(void) __attribute__((weak, alias("default_handler")));
+void otg_fs_wkup_handler(void) __attribute__((weak, alias("default_handler")));
+void otg_fs_handler(void) __attribute__((weak, alias("default_handler")));
+void dmamux1_ov_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_mst_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_tima_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_timb_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_timc_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_timd_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_time_handler(void) __attribute__((weak, alias("default_handler")));
+void hrtim1_flt_handler(void) __attribute__((weak, alias("default_handler")));
+void dfsdm1_flt0_handler(void) __attribute__((weak, alias("default_handler")));
+void dfsdm1_flt1_handler(void) __attribute__((weak, alias("default_handler")));
+void dfsdm1_flt2_handler(void) __attribute__((weak, alias("default_handler")));
+void dfsdm1_flt3_handler(void) __attribute__((weak, alias("default_handler")));
+void sai3_handler(void) __attribute__((weak, alias("default_handler")));
+void swpmi1_handler(void) __attribute__((weak, alias("default_handler")));
+void tim15_handler(void) __attribute__((weak, alias("default_handler")));
+void tim16_handler(void) __attribute__((weak, alias("default_handler")));
+void tim17_handler(void) __attribute__((weak, alias("default_handler")));
+void mdios_wkup_handler(void) __attribute__((weak, alias("default_handler")));
+void mdios_handler(void) __attribute__((weak, alias("default_handler")));
+void jpeg_handler(void) __attribute__((weak, alias("default_handler")));
+void mdma_handler(void) __attribute__((weak, alias("default_handler")));
+void dsi_dsi_wkup_handler(void) __attribute__((weak, alias("default_handler")));
+void sdmmc2_handler(void) __attribute__((weak, alias("default_handler")));
+void hsem0_handler(void) __attribute__((weak, alias("default_handler")));
+void adc3_handler(void) __attribute__((weak, alias("default_handler")));
+void dmamux2_ovr_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch0_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch1_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch2_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch3_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch4_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch5_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch6_handler(void) __attribute__((weak, alias("default_handler")));
+void bdma_ch7_handler(void) __attribute__((weak, alias("default_handler")));
+void comp_handler(void) __attribute__((weak, alias("default_handler")));
+void lptim2_handler(void) __attribute__((weak, alias("default_handler")));
+void lptim3_handler(void) __attribute__((weak, alias("default_handler")));
+void lptim4_handler(void) __attribute__((weak, alias("default_handler")));
+void lptim5_handler(void) __attribute__((weak, alias("default_handler")));
+void lptim6_handler(void) __attribute__((weak, alias("default_handler")));
+void lpuart_handler(void) __attribute__((weak, alias("default_handler")));
+void wwdg2_rst_handler(void) __attribute__((weak, alias("default_handler")));
+void crs_handler(void) __attribute__((weak, alias("default_handler")));
+void ecc_handler(void) __attribute__((weak, alias("default_handler")));
+void sai4_handler(void) __attribute__((weak, alias("default_handler")));
+void hold_core_handler(void) __attribute__((weak, alias("default_handler")));
+void wkup_handler(void) __attribute__((weak, alias("default_handler")));
+
+uint32_t isr_vector[ISR_VECTOR_SIZE_WORDS] __attribute__((section(".isr_vector"))) = {
+ STACK_POINTER_INIT_ADDRESS,
+ (uint32_t)&reset_handler,
+ (uint32_t)&nmi_handler,
+ (uint32_t)&hard_fault_handler,
+ (uint32_t)&bus_fault_handler,
+ (uint32_t)&usage_fault_handler,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&svcall_handler,
+ (uint32_t)&debug_monitor_handler,
+ 0,
+ (uint32_t)&pendsv_handler,
+ (uint32_t)&systick_handler,
+ (uint32_t)&wwdg_handler, /* window watchdog */
+ (uint32_t)&pvd_pvm_handler, /* pvd through exti line detection */
+ (uint32_t)&rtc_tamp_stamp_css_lse_handler, /* tamper and timestamps through the exti line */
+ (uint32_t)&rtc_wkup_handler, /* rtc wakeup through the exti line */
+ (uint32_t)&flash_handler, /* flash */
+ (uint32_t)&rcc_handler, /* rcc */
+ (uint32_t)&exti0_handler, /* exti line0 */
+ (uint32_t)&exti1_handler, /* exti line1 */
+ (uint32_t)&exti2_handler, /* exti line2 */
+ (uint32_t)&exti3_handler, /* exti line3 */
+ (uint32_t)&exti4_handler, /* exti line4 */
+ (uint32_t)&dma1_stream0_handler, /* dma1 stream 0 */
+ (uint32_t)&dma1_stream1_handler, /* dma1 stream 1 */
+ (uint32_t)&dma1_stream2_handler, /* dma1 stream 2 */
+ (uint32_t)&dma1_stream3_handler, /* dma1 stream 3 */
+ (uint32_t)&dma1_stream4_handler, /* dma1 stream 4 */
+ (uint32_t)&dma1_stream5_handler, /* dma1 stream 5 */
+ (uint32_t)&dma1_stream6_handler, /* dma1 stream 6 */
+ (uint32_t)&adc_1_2_handler, /* adc1, adc2 and adc3s */
+ (uint32_t)&fccan1_it0_handler,
+ (uint32_t)&fccan2_it0_handler,
+ (uint32_t)&fccan1_it1_handler,
+ (uint32_t)&fccan2_it1_handler,
+ (uint32_t)&exti9_5_handler, /* external line[9:5]s */
+ (uint32_t)&tim1_brk_handler, /* tim1 break and tim9 */
+ (uint32_t)&tim1_up_handler, /* tim1 update and tim10 */
+ (uint32_t)&tim1_trg_com_handler, /* tim1 trigger and commutation and tim11 */
+ (uint32_t)&tim_cc_handler, /* tim1 capture compare */
+ (uint32_t)&tim2_handler, /* tim2 */
+ (uint32_t)&tim3_handler, /* tim3 */
+ (uint32_t)&tim4_handler, /* tim4 */
+ (uint32_t)&i2c1_ev_handler, /* i2c1 event */
+ (uint32_t)&i2c1_er_handler, /* i2c1 error */
+ (uint32_t)&i2c2_ev_handler, /* i2c2 event */
+ (uint32_t)&i2c2_er_handler, /* i2c2 error */
+ (uint32_t)&spi1_handler, /* spi1 */
+ (uint32_t)&spi2_handler, /* spi2 */
+ (uint32_t)&usart1_handler, /* usart1 */
+ (uint32_t)&usart2_handler, /* usart2 */
+ (uint32_t)&usart3_handler, /* usart3 */
+ (uint32_t)&exti15_10_handler, /* external line[15:10]s */
+ (uint32_t)&rtc_alarm_handler, /* rtc alarm (a and b) through exti line */
+ 0,
+ (uint32_t)&tim8_brk_tim12_handler, /* tim8 break and tim12 */
+ (uint32_t)&tim8_up_tim13_handler, /* tim8 update and tim13 */
+ (uint32_t)&tim8_trg_com_tim14_handler, /* tim8 trigger and commutation and tim14 */
+ (uint32_t)&tim8_cc_handler, /* tim8 capture compare */
+ (uint32_t)&dma1_stream7_handler, /* dma1 stream7 */
+ (uint32_t)&fmc_handler, /* fmc */
+ (uint32_t)&sdmmc1_handler,
+ (uint32_t)&tim5_handler, /* tim5 */
+ (uint32_t)&spi3_handler, /* spi3 */
+ (uint32_t)&uart4_handler, /* uart4 */
+ (uint32_t)&uart5_handler, /* uart5 */
+ (uint32_t)&tim6_dac_handler, /* tim6 and dac1&2 underrun errors */
+ (uint32_t)&tim7_handler, /* tim7 */
+ (uint32_t)&dma2_stream0_handler, /* dma2 stream 0 */
+ (uint32_t)&dma2_stream1_handler, /* dma2 stream 1 */
+ (uint32_t)&dma2_stream2_handler, /* dma2 stream 2 */
+ (uint32_t)&dma2_stream3_handler, /* dma2 stream 3 */
+ (uint32_t)&dma2_stream4_handler, /* dma2 stream 4 */
+ (uint32_t)ð_handler,
+ (uint32_t)ð_wkup_handler,
+ (uint32_t)&fdcan_cal_handler,
+ 0,
+ 0,
+ 0,
+ 0,
+ (uint32_t)&dma2_stream5_handler, /* dma2 stream 5 */
+ (uint32_t)&dma2_stream6_handler, /* dma2 stream 6 */
+ (uint32_t)&dma2_stream7_handler, /* dma2 stream 7 */
+ (uint32_t)&usart6_handler, /* usart6 */
+ (uint32_t)&i2c3_ev_handler, /* i2c3 event */
+ (uint32_t)&i2c3_er_handler, /* i2c3 error */
+ (uint32_t)&otg_hs_ep1_out_handler, /* usb otg hs end point 1 out */
+ (uint32_t)&otg_hs_ep1_in_handler, /* usb otg hs end point 1 in */
+ (uint32_t)&otg_hs_wkup_handler, /* usb otg hs wakeup through exti */
+ (uint32_t)&otg_hs_handler, /* usb otg hs */
+ (uint32_t)&dcmi_handler, /* dcmi */
+ (uint32_t)&cryp_handler,
+ (uint32_t)&hash_rng_handler,
+ (uint32_t)&fpu_handler, /* fpu */
+ (uint32_t)&uart7_handler,
+ (uint32_t)&uart8_handler,
+ (uint32_t)&spi4_handler, /* spi4 */
+ (uint32_t)&spi5_handler, /* spi5 */
+ (uint32_t)&spi6_handler, /* spi6 */
+ (uint32_t)&sai1_handler, /* sai1 */
+ (uint32_t)<dc_handler,
+ (uint32_t)<dc_er_handler,
+ (uint32_t)&dma2d_handler,
+ (uint32_t)&sai2_handler,
+ (uint32_t)&quadspi_handler, /* quadspi */
+ (uint32_t)&lptim1_handler, /* cec */
+ (uint32_t)&cec_handler, /* cec */
+ (uint32_t)&i2c4_ev_handler,
+ (uint32_t)&i2c4_er_handler,
+ (uint32_t)&spdif_handler, /* spdif rx */
+ (uint32_t)&otg_fs_ep1_out_handler,
+ (uint32_t)&otg_fs_ep1_in_handler,
+ (uint32_t)&otg_fs_wkup_handler,
+ (uint32_t)&otg_fs_handler,
+ (uint32_t)&dmamux1_ov_handler,
+ (uint32_t)&hrtim1_mst_handler,
+ (uint32_t)&hrtim1_tima_handler,
+ (uint32_t)&hrtim1_timb_handler,
+ (uint32_t)&hrtim1_timc_handler,
+ (uint32_t)&hrtim1_timd_handler,
+ (uint32_t)&hrtim1_time_handler,
+ (uint32_t)&hrtim1_flt_handler,
+ (uint32_t)&dfsdm1_flt0_handler,
+ (uint32_t)&dfsdm1_flt1_handler,
+ (uint32_t)&dfsdm1_flt2_handler,
+ (uint32_t)&dfsdm1_flt3_handler,
+ (uint32_t)&sai3_handler,
+ (uint32_t)&swpmi1_handler,
+ (uint32_t)&tim15_handler,
+ (uint32_t)&tim16_handler,
+ (uint32_t)&tim17_handler,
+ (uint32_t)&mdios_wkup_handler,
+ (uint32_t)&mdios_handler,
+ (uint32_t)&jpeg_handler,
+ (uint32_t)&mdma_handler,
+ (uint32_t)&dsi_dsi_wkup_handler,
+ (uint32_t)&sdmmc2_handler,
+ (uint32_t)&hsem0_handler,
+ 0,
+ (uint32_t)&adc3_handler,
+ (uint32_t)&dmamux2_ovr_handler,
+ (uint32_t)&bdma_ch0_handler,
+ (uint32_t)&bdma_ch1_handler,
+ (uint32_t)&bdma_ch2_handler,
+ (uint32_t)&bdma_ch3_handler,
+ (uint32_t)&bdma_ch4_handler,
+ (uint32_t)&bdma_ch5_handler,
+ (uint32_t)&bdma_ch6_handler,
+ (uint32_t)&bdma_ch7_handler,
+ (uint32_t)&comp_handler,
+ (uint32_t)&lptim2_handler,
+ (uint32_t)&lptim3_handler,
+ (uint32_t)&lptim4_handler,
+ (uint32_t)&lptim5_handler,
+ (uint32_t)&lpuart_handler,
+ (uint32_t)&wwdg2_rst_handler,
+ (uint32_t)&crs_handler,
+ (uint32_t)&ecc_handler,
+ (uint32_t)&sai4_handler,
+ 0,
+ (uint32_t)&hold_core_handler,
+ (uint32_t)&wkup_handler
+};
+
+void default_handler(void)
+{
+ while(1);
+}
A => devices/stm32h747/linker_script.ld +53 -0
@@ 1,53 @@
+MEMORY
+{
+ FLASH (rx): ORIGIN = 0x08000000, LENGTH = 512K
+ SRAM (rwx): ORIGIN = 0x24000000, LENGTH = 512K
+}
+
+SECTIONS
+{
+ .isr_vector :
+ {
+ KEEP(*(.isr_vector))
+ } >FLASH
+
+ .text :
+ {
+ . = ALIGN(4);
+
+ *(.text)
+ *(.rodata)
+
+ . = ALIGN(4);
+ _etext = .;
+ } >FLASH
+
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .;
+
+ *(.data)
+
+ . = ALIGN(4);
+ _edata = .;
+ } >SRAM AT> FLASH
+
+ _data_size = _edata - _sdata;
+ _data_loadaddr = LOADADDR(.data);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ _sbss = .;
+
+ *(.bss)
+
+ . = ALIGN(4);
+ _ebss = .;
+ } >SRAM
+
+ _bss_size = _ebss - _sbss;
+}
+
+ENTRY(reset_handler)
A => manifest.scm +20 -0
@@ 1,20 @@
+(use-modules
+ (gnu packages embedded))
+
+(concatenate-manifests
+ (list
+ (packages->manifest
+ (list
+ (make-gdb-arm-none-eabi)))
+
+ (specifications->manifest
+ (list
+ "arm-none-eabi-toolchain"
+ "gdb"
+
+ "openocd"
+ "stlink"
+
+ "make"
+
+ "man-db"))))
A => src/main.c +41 -0
@@ 1,41 @@
+#include <stdint.h>
+
+#define PERIPHERAL_BASE (0x40000000U)
+#define AHB4_BASE (PERIPHERAL_BASE + 0x18020000U)
+#define GPIOI_BASE (AHB4_BASE + 0x2000U)
+#define RCC_BASE (AHB4_BASE + 0x4400U)
+
+#define RCC_AHB4ENR_OFFSET (0xE0U)
+#define RCC_AHB4ENR ((volatile uint32_t*) (RCC_BASE + RCC_AHB4ENR_OFFSET))
+#define RCC_AHB4ENR_GPIOIEN (0x08U)
+
+#define GPIO_MODER_OFFSET (0x00U)
+#define GPIOI_MODER ((volatile uint32_t*) (GPIOI_BASE + GPIO_MODER_OFFSET))
+#define GPIO_MODER_MODER5 (10U)
+#define GPIO_MODER_MODER13 (26U)
+#define GPIO_MODER_MODER12 (24U)
+#define GPIO_ODR_OFFSET (0x14U)
+#define GPIOI_ODR ((volatile uint32_t*) (GPIOI_BASE + GPIO_ODR_OFFSET))
+
+#define LED1_PIN 12
+#define LED2_PIN 13
+
+void main()
+{
+ *RCC_AHB4ENR |= (1 << RCC_AHB4ENR_GPIOIEN);
+
+ // do two dummy reads after enabling the peripheral clock
+ volatile uint32_t dummy;
+ dummy = *(RCC_AHB4ENR);
+ dummy = *(RCC_AHB4ENR);
+
+ *GPIOI_MODER = (1 << GPIO_MODER_MODER12) | (1 << GPIO_MODER_MODER13);
+
+ *GPIOI_ODR ^= (1 << LED2_PIN);
+ while(1)
+ {
+ *GPIOI_ODR ^= (1 << LED1_PIN);
+ *GPIOI_ODR ^= (1 << LED2_PIN);
+ for (uint32_t i = 0; i < 2000000; i++);
+ }
+}