~ruther/stm32-templates

84d81bf157de3ffe16d7427b49a8085df4b8c08c — Rutherther 6 months ago 17b62d8
feat: add stm32f407 device
A devices/stm32f407/include/defines.h => devices/stm32f407/include/defines.h +4 -0
@@ 0,0 1,4 @@
#define SRAM_START (0x20000000U)
#define SRAM_SIZE (128U * 1024U)
#define SRAM_END (SRAM_START + SRAM_SIZE)
#define STACK_POINTER_INIT_ADDRESS (SRAM_END)

A devices/stm32f407/isr.c => devices/stm32f407/isr.c +212 -0
@@ 0,0 1,212 @@
#include <stdint.h>
#include "defines.h"
#define ISR_VECTOR_SIZE_WORDS 114

void reset_handler(void);
void default_handler(void);
void nmi_handler(void) __attribute__((weak, alias("default_handler")));
void hard_fault_handler(void) __attribute__((weak, alias("default_handler")));
void bus_fault_handler(void) __attribute__((weak, alias("default_handler")));
void usage_fault_handler(void) __attribute__((weak, alias("default_handler")));
void svcall_handler(void) __attribute__((weak, alias("default_handler")));
void debug_monitor_handler(void) __attribute__((weak, alias("default_handler")));
void pendsv_handler(void) __attribute__((weak, alias("default_handler")));
void systick_handler(void) __attribute__((weak, alias("default_handler")));
void WWDG_handler(void) __attribute__((weak, alias("default_handler")));
void PVD_handler(void) __attribute__((weak, alias("default_handler")));
void TAMP_STAMP_handler(void) __attribute__((weak, alias("default_handler")));
void RTC_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
void FLASH_handler(void) __attribute__((weak, alias("default_handler")));
void RCC_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI0_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI1_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI2_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI3_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI4_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
void ADC_handler(void) __attribute__((weak, alias("default_handler")));
void CAN1_TX_handler(void) __attribute__((weak, alias("default_handler")));
void CAN1_RX0_handler(void) __attribute__((weak, alias("default_handler")));
void CAN1_RX1_handler(void) __attribute__((weak, alias("default_handler")));
void SCE_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI9_5_handler(void) __attribute__((weak, alias("default_handler")));
void TIM1_BRK_TIM9_handler(void) __attribute__((weak, alias("default_handler")));
void TIM1_UP_TIM10_handler(void) __attribute__((weak, alias("default_handler")));
void TIM1_TRG_COM_TIM11_handler(void) __attribute__((weak, alias("default_handler")));
void TIM1_CC_handler(void) __attribute__((weak, alias("default_handler")));
void TIM2_handler(void) __attribute__((weak, alias("default_handler")));
void TIM3_handler(void) __attribute__((weak, alias("default_handler")));
void TIM4_handler(void) __attribute__((weak, alias("default_handler")));
void I2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
void I2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));
void I2C2_EV_handler(void) __attribute__((weak, alias("default_handler")));
void I2C2_ER_handler(void) __attribute__((weak, alias("default_handler")));
void SPI1_handler(void) __attribute__((weak, alias("default_handler")));
void SPI2_handler(void) __attribute__((weak, alias("default_handler")));
void USART1_handler(void) __attribute__((weak, alias("default_handler")));
void USART2_handler(void) __attribute__((weak, alias("default_handler")));
void USART3_handler(void) __attribute__((weak, alias("default_handler")));
void EXTI15_10_handler(void) __attribute__((weak, alias("default_handler")));
void RTC_Alarm_handler(void) __attribute__((weak, alias("default_handler")));
void OTG_FS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
void TIM8_BRK_TIM12_handler(void) __attribute__((weak, alias("default_handler")));
void TIM8_UP_TIM13_handler(void) __attribute__((weak, alias("default_handler")));
void TIM8_TRG_COM_TIM14_handler(void) __attribute__((weak, alias("default_handler")));
void TIM8_CC_handler(void) __attribute__((weak, alias("default_handler")));
void DMA1_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
void FSMC_handler(void) __attribute__((weak, alias("default_handler")));
void SDIO_handler(void) __attribute__((weak, alias("default_handler")));
void TIM5_handler(void) __attribute__((weak, alias("default_handler")));
void SPI3_handler(void) __attribute__((weak, alias("default_handler")));
void UART4_handler(void) __attribute__((weak, alias("default_handler")));
void UART5_handler(void) __attribute__((weak, alias("default_handler")));
void TIM6_DAC_handler(void) __attribute__((weak, alias("default_handler")));
void TIM7_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream0_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream1_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream2_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream3_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream4_handler(void) __attribute__((weak, alias("default_handler")));
void ETH_handler(void) __attribute__((weak, alias("default_handler")));
void ETH_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
void CAN2_TX_handler(void) __attribute__((weak, alias("default_handler")));
void CAN2_RX0_handler(void) __attribute__((weak, alias("default_handler")));
void CAN2_RX1_handler(void) __attribute__((weak, alias("default_handler")));
void CAN2_SCE_handler(void) __attribute__((weak, alias("default_handler")));
void OTG_FS_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream5_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream6_handler(void) __attribute__((weak, alias("default_handler")));
void DMA2_Stream7_handler(void) __attribute__((weak, alias("default_handler")));
void USART6_handler(void) __attribute__((weak, alias("default_handler")));
void I2C3_EV_handler(void) __attribute__((weak, alias("default_handler")));
void I2C3_ER_handler(void) __attribute__((weak, alias("default_handler")));
void OTG_HS_EP1_OUT_handler(void) __attribute__((weak, alias("default_handler")));
void OTG_HS_EP1_IN_handler(void) __attribute__((weak, alias("default_handler")));
void OTG_HS_WKUP_handler(void) __attribute__((weak, alias("default_handler")));
void OTG_HS_handler(void) __attribute__((weak, alias("default_handler")));
void DCMI_handler(void) __attribute__((weak, alias("default_handler")));
void CRYP_handler(void) __attribute__((weak, alias("default_handler")));
void HASH_RNG_handler(void) __attribute__((weak, alias("default_handler")));
void FPU_handler(void) __attribute__((weak, alias("default_handler")));
void SPI4_handler(void) __attribute__((weak, alias("default_handler")));
void SAI1_handler(void) __attribute__((weak, alias("default_handler")));
void SAI2_handler(void) __attribute__((weak, alias("default_handler")));
void QUADSPI_handler(void) __attribute__((weak, alias("default_handler")));
void CEC_handler(void) __attribute__((weak, alias("default_handler")));
void SPDIF_RX_handler(void) __attribute__((weak, alias("default_handler")));
void FMPI2C1_EV_handler(void) __attribute__((weak, alias("default_handler")));
void FMPI2C1_ER_handler(void) __attribute__((weak, alias("default_handler")));

uint32_t isr_vector[ISR_VECTOR_SIZE_WORDS] __attribute__((section(".isr_vector"))) = {
  STACK_POINTER_INIT_ADDRESS,
  // arm cortex interrupts
  (uint32_t)&reset_handler,
  (uint32_t)&nmi_handler,
  (uint32_t)&hard_fault_handler,
  (uint32_t)&bus_fault_handler,
  (uint32_t)&usage_fault_handler,
  0,
  0,
  0,
  0,
  0,
  (uint32_t)&svcall_handler,
  (uint32_t)&debug_monitor_handler,
  0,
  (uint32_t)&pendsv_handler,
  (uint32_t)&systick_handler,
  // device specific interrupts
  (uint32_t)&WWDG_handler, /* Window WatchDog */
  (uint32_t)&PVD_handler, /* PVD through EXTI Line detection */
  (uint32_t)&TAMP_STAMP_handler, /* Tamper and TimeStamps through the EXTI line */
  (uint32_t)&RTC_WKUP_handler, /* RTC Wakeup through the EXTI line */
  (uint32_t)&FLASH_handler, /* FLASH */
  (uint32_t)&RCC_handler, /* RCC */
  (uint32_t)&EXTI0_handler, /* EXTI Line0 */
  (uint32_t)&EXTI1_handler, /* EXTI Line1 */
  (uint32_t)&EXTI2_handler, /* EXTI Line2 */
  (uint32_t)&EXTI3_handler, /* EXTI Line3 */
  (uint32_t)&EXTI4_handler, /* EXTI Line4 */
  (uint32_t)&DMA1_Stream0_handler, /* DMA1 Stream 0                */
  (uint32_t)&DMA1_Stream1_handler, /* DMA1 Stream 1                */
  (uint32_t)&DMA1_Stream2_handler, /* DMA1 Stream 2                */
  (uint32_t)&DMA1_Stream3_handler, /* DMA1 Stream 3 */
  (uint32_t)&DMA1_Stream4_handler, /* DMA1 Stream 4 */
  (uint32_t)&DMA1_Stream5_handler, /* DMA1 Stream 5 */
  (uint32_t)&DMA1_Stream6_handler, /* DMA1 Stream 6 */
  (uint32_t)&ADC_handler, /* ADC1, ADC2 and ADC3s         */
  (uint32_t)&CAN1_TX_handler, /* CAN1 TX                      */
  (uint32_t)&CAN1_RX0_handler, /* CAN1 RX0                     */
  (uint32_t)&CAN1_RX1_handler, /* CAN1 RX1                     */
  (uint32_t)&SCE_handler, /* CAN1 SCE                     */
  (uint32_t)&EXTI9_5_handler, /* External Line[9:5]s          */
  (uint32_t)&TIM1_BRK_TIM9_handler, /* TIM1 Break and TIM9          */
  (uint32_t)&TIM1_UP_TIM10_handler, /* TIM1 Update and TIM10        */
  (uint32_t)&TIM1_TRG_COM_TIM11_handler, /* TIM1 Trigger and Commutation and TIM11 */
  (uint32_t)&TIM1_CC_handler, /* TIM1 Capture Compare         */
  (uint32_t)&TIM2_handler, /* TIM2                         */
  (uint32_t)&TIM3_handler, /* TIM3                         */
  (uint32_t)&TIM4_handler, /* TIM4                         */
  (uint32_t)&I2C1_EV_handler, /* I2C1 Event                   */
  (uint32_t)&I2C1_ER_handler, /* I2C1 Error                   */
  (uint32_t)&I2C2_EV_handler, /* I2C2 Event                   */
  (uint32_t)&I2C2_ER_handler, /* I2C2 Error                   */
  (uint32_t)&SPI1_handler, /* SPI1                         */
  (uint32_t)&SPI2_handler, /* SPI2                         */
  (uint32_t)&USART1_handler, /* USART1                       */
  (uint32_t)&USART2_handler, /* USART2                       */
  (uint32_t)&USART3_handler, /* USART3                       */
  (uint32_t)&EXTI15_10_handler, /* External Line[15:10]s        */
  (uint32_t)&RTC_Alarm_handler, /* RTC Alarm (A and B) through EXTI Line */
  (uint32_t)&OTG_FS_WKUP_handler, /* USB OTG FS Wakeup through EXTI line */
  (uint32_t)&TIM8_BRK_TIM12_handler, /* TIM8 Break and TIM12         */
  (uint32_t)&TIM8_UP_TIM13_handler, /* TIM8 Update and TIM13        */
  (uint32_t)&TIM8_TRG_COM_TIM14_handler, /* TIM8 Trigger and Commutation and TIM14 */
  (uint32_t)&TIM8_CC_handler, /* TIM8 Capture Compare         */
  (uint32_t)&DMA1_Stream7_handler, /* DMA1 Stream7                 */
  (uint32_t)&FSMC_handler, /* FMC                          */
  (uint32_t)&SDIO_handler, /* SDIO                         */
  (uint32_t)&TIM5_handler, /* TIM5                         */
  (uint32_t)&SPI3_handler, /* SPI3                         */
  (uint32_t)&UART4_handler, /* UART4                        */
  (uint32_t)&UART5_handler, /* UART5                        */
  (uint32_t)&TIM6_DAC_handler, /* TIM6 and DAC1&2 underrun errors */
  (uint32_t)&TIM7_handler, /* TIM7                         */
  (uint32_t)&DMA2_Stream0_handler, /* DMA2 Stream 0                */
  (uint32_t)&DMA2_Stream1_handler, /* DMA2 Stream 1                */
  (uint32_t)&DMA2_Stream2_handler, /* DMA2 Stream 2                */
  (uint32_t)&DMA2_Stream3_handler, /* DMA2 Stream 3                */
  (uint32_t)&DMA2_Stream4_handler, /* DMA2 Stream 4                */
  (uint32_t)&ETH_handler,
  (uint32_t)&ETH_WKUP_handler,
  (uint32_t)&CAN2_TX_handler, /* CAN2 TX                      */
  (uint32_t)&CAN2_RX0_handler, /* CAN2 RX0                     */
  (uint32_t)&CAN2_RX1_handler, /* CAN2 RX1                     */
  (uint32_t)&CAN2_SCE_handler, /* CAN2 SCE                     */
  (uint32_t)&OTG_FS_handler, /* USB OTG FS                   */
  (uint32_t)&DMA2_Stream5_handler, /* DMA2 Stream 5                */
  (uint32_t)&DMA2_Stream6_handler, /* DMA2 Stream 6                */
  (uint32_t)&DMA2_Stream7_handler, /* DMA2 Stream 7                */
  (uint32_t)&USART6_handler, /* USART6                       */
  (uint32_t)&I2C3_EV_handler, /* I2C3 event                   */
  (uint32_t)&I2C3_ER_handler, /* I2C3 error                   */
  (uint32_t)&OTG_HS_EP1_OUT_handler, /* USB OTG HS End Point 1 Out   */
  (uint32_t)&OTG_HS_EP1_IN_handler, /* USB OTG HS End Point 1 In    */
  (uint32_t)&OTG_HS_WKUP_handler, /* USB OTG HS Wakeup through EXTI */
  (uint32_t)&OTG_HS_handler, /* USB OTG HS                   */
  (uint32_t)&DCMI_handler, /* DCMI                         */
  (uint32_t)&CRYP_handler, /* CRYP crypto global interrupt */
  (uint32_t)&HASH_RNG_handler, /* Hash and Rng global interrupt */
  (uint32_t)&FPU_handler /* FPU                          */
};

void default_handler(void)
{
  while(1);
}

A devices/stm32f407/linker_script.ld => devices/stm32f407/linker_script.ld +53 -0
@@ 0,0 1,53 @@
MEMORY
{
  FLASH (rx): ORIGIN = 0x08000000, LENGTH = 1024K
  SRAM (rwx): ORIGIN = 0x20000000, LENGTH = 128K
}

SECTIONS
{
  .isr_vector :
  {
    KEEP(*(.isr_vector))
  } >FLASH

  .text :
  {
    . = ALIGN(4);

    *(.text)
    *(.rodata)

    . = ALIGN(4);
    _etext = .;
  } >FLASH

  .data :
  {
    . = ALIGN(4);
    _sdata = .;

    *(.data)

    . = ALIGN(4);
    _edata = .;
  } >SRAM AT> FLASH

  _data_size = _edata - _sdata;
  _data_loadaddr = LOADADDR(.data);

  .bss :
  {
    . = ALIGN(4);
    _sbss = .;

    *(.bss)

    . = ALIGN(4);
    _ebss = .;
  } >SRAM

  _bss_size = _ebss - _sbss;
}

ENTRY(reset_handler)

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