From 229ffc406ec7bb800180684b79e8203d68ddd3e2 Mon Sep 17 00:00:00 2001
From: Rutherther <rutherther@protonmail.com>
Date: Thu, 3 Oct 2024 08:12:27 +0200
Subject: [PATCH] feat: blinking leds on STM32H747I-DISCO

---
 Makefile   |  4 ++--
 src/main.c | 37 +++++++++++++++++++++----------------
 2 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/Makefile b/Makefile
index cd69360b5e457b40ad45c7ab1fb28862af2c0fa0..31db5cb4de774400e2ca830dec3635626ccc7f80 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
-DEVICE?=stm32f446
-TARGET?=stm32f4x
+DEVICE?=stm32h747
+TARGET?=stm32h7x
 CPU?=cortex-m7
 
 APP=blink.elf
diff --git a/src/main.c b/src/main.c
index 5b8549a7142acb24d5e41beb949a2e9aa4dc5e9a..202d39414df9698a31f20ede4a5cbbc41e0b7936 100644
--- a/src/main.c
+++ b/src/main.c
@@ -1,36 +1,41 @@
 #include <stdint.h>
 
 #define PERIPHERAL_BASE (0x40000000U)
-#define AHB1_BASE (PERIPHERAL_BASE + 0x20000U)
-#define GPIOA_BASE (AHB1_BASE + 0x0U)
-#define RCC_BASE (AHB1_BASE + 0x3800U)
+#define AHB4_BASE (PERIPHERAL_BASE + 0x18020000U)
+#define GPIOI_BASE (AHB4_BASE + 0x2000U)
+#define RCC_BASE (AHB4_BASE + 0x4400U)
 
-#define RCC_AHB1ENR_OFFSET (0x30U)
-#define RCC_AHB1ENR ((volatile uint32_t*) (RCC_BASE + RCC_AHB1ENR_OFFSET))
-#define RCC_AHB1ENR_GPIOAEN (0x00U)
+#define RCC_AHB4ENR_OFFSET (0xE0U)
+#define RCC_AHB4ENR ((volatile uint32_t*) (RCC_BASE + RCC_AHB4ENR_OFFSET))
+#define RCC_AHB4ENR_GPIOIEN (0x08U)
 
 #define GPIO_MODER_OFFSET (0x00U)
-#define GPIOA_MODER ((volatile uint32_t*) (GPIOA_BASE + GPIO_MODER_OFFSET))
+#define GPIOI_MODER ((volatile uint32_t*) (GPIOI_BASE + GPIO_MODER_OFFSET))
 #define GPIO_MODER_MODER5 (10U)
+#define GPIO_MODER_MODER13 (26U)
+#define GPIO_MODER_MODER12 (24U)
 #define GPIO_ODR_OFFSET (0x14U)
-#define GPIOA_ODR ((volatile uint32_t*) (GPIOA_BASE + GPIO_ODR_OFFSET))
+#define GPIOI_ODR ((volatile uint32_t*) (GPIOI_BASE + GPIO_ODR_OFFSET))
 
-#define LED_PIN 5
+#define LED1_PIN 12
+#define LED2_PIN 13
 
 void main()
 {
- *RCC_AHB1ENR |= (1 << RCC_AHB1ENR_GPIOAEN);
+ *RCC_AHB4ENR |= (1 << RCC_AHB4ENR_GPIOIEN);
 
-  // do two dummy reads after enabling the peripheral clock, as per the errata
+  // do two dummy reads after enabling the peripheral clock
   volatile uint32_t dummy;
-  dummy = *(RCC_AHB1ENR);
-  dummy = *(RCC_AHB1ENR);
+  dummy = *(RCC_AHB4ENR);
+  dummy = *(RCC_AHB4ENR);
 
-  *GPIOA_MODER |= (1 << GPIO_MODER_MODER5);
+  *GPIOI_MODER = (1 << GPIO_MODER_MODER12) | (1 << GPIO_MODER_MODER13);
 
+  *GPIOI_ODR ^= (1 << LED2_PIN);
   while(1)
   {
-    *GPIOA_ODR ^= (1 << LED_PIN);
-    for (uint32_t i = 0; i < 500000; i++);
+    *GPIOI_ODR ^= (1 << LED1_PIN);
+    *GPIOI_ODR ^= (1 << LED2_PIN);
+    for (uint32_t i = 0; i < 2000000; i++);
   }
 }