1 files changed, 8 insertions(+), 2 deletions(-)

M src/data_link/lane_alignment.vhd

@@ 49,6 49,8 @@ architecture a1 of lane_alignment is
   type buffer_array is array (0 to buffer_size) of character_vector;
   signal buff : buffer_array := (others => ('0', '0', '0', "00000000", '0'));
 
+  signal temp_char : character_vector;
+
   signal reg_ready : std_logic := '0';
   signal reg_started : std_logic := '0';
   signal reg_error : std_logic := '0';


@@ 102,8 104,12 @@ begin  -- architecture a1
                 '1' when reg_ready = '1' and reg_started = '0' and (reg_write_index = 0) else
                 '0';
 
-  do_char <= dummy_character when ci_state = INIT or reg_started = '0' else
+  temp_char <= dummy_character when ci_state = INIT or reg_started = '0' else
              buff(reg_read_index);
-  -- TODO do_char.user_data <= '1' when ci_state = DATA and reg_started = '1' else '0';
+  do_char.d8b <= temp_char.d8b;
+  do_char.kout <= temp_char.kout;
+  do_char.disparity_error <= temp_char.disparity_error;
+  do_char.missing_error <= temp_char.missing_error;
+  do_char.user_data <= '1' when ci_state = DATA and reg_started = '1' else '0';
 
 end architecture a1;