~ruther/jesd204b-vhdl

2315856bc9404c4bec97a19d6bcc222031faf985 — František Boháček 2 years ago 34fd107
feat: start emptying lane aligned buffer only if not in CGS
1 files changed, 1 insertions(+), 1 deletions(-)

M src/data_link/lane_alignment.vhd
M src/data_link/lane_alignment.vhd => src/data_link/lane_alignment.vhd +1 -1
@@ 93,7 93,7 @@ begin  -- architecture a1
  next_ready <= '0' when ci_state = INIT else
                '1' when reg_ready = '1' or (di_char.kout = '1' and di_char.d8b = R_character and (ci_state = CGS or ci_state = ILS)) else
                '0';
  next_started <= '0' when reg_ready = '0' else
  next_started <= '0' when reg_ready = '0' or ci_state = CGS else
                  '1' when (ci_start = '1' or reg_started = '1') else
                  '0';
  co_aligned <= reg_started;            -- TODO: check for misalignment

Do not follow this link