feat: add altium project with outputs
5 files changed, 31 insertions(+), 0 deletions(-) A pcb/Altium/.gitignore A pcb/Altium/PCB1.PcbDoc A pcb/Altium/guess_the_number.SchDoc A pcb/pcb.pdf A pcb/schematic.pdf
A pcb/Altium/.gitignore => pcb/Altium/.gitignore +31 -0
@@ 0,0 1,31 @@ # Various Altium files *.PrjPCBStructure *.SchDocPreview *.PcbDocPreview __Previews *.PrjPcbStructure *.Dat *.REP *.TLT *.LOG *.log *.htm *.$$$ #useless dirs Project\ Outputs Project\ Logs Project Outputs for* #History History #Exports, but not manual ones exports/* !exports/manual #Python stuff scripts/__pycache__/ *.bak *.dwl *.dwl2 \ No newline at end of file
A pcb/Altium/PCB1.PcbDoc => pcb/Altium/PCB1.PcbDoc +0 -0
A pcb/Altium/guess_the_number.SchDoc => pcb/Altium/guess_the_number.SchDoc +0 -0
A pcb/pcb.pdf => pcb/pcb.pdf +0 -0
A pcb/schematic.pdf => pcb/schematic.pdf +0 -0