From f64c737b14b20c2037411696312a67f47eeef932 Mon Sep 17 00:00:00 2001 From: Andrew Dona-Couch Date: Wed, 19 Aug 2020 17:51:23 -0400 Subject: [PATCH] Extract common USI patch from tiny84/85 --- patch/attiny84.yaml | 26 +------------------------- patch/attiny85.yaml | 26 +------------------------- patch/common/tiny/usi.yaml | 25 +++++++++++++++++++++++++ 3 files changed, 27 insertions(+), 50 deletions(-) create mode 100644 patch/common/tiny/usi.yaml diff --git a/patch/attiny84.yaml b/patch/attiny84.yaml index 6873c0be933c61dca8650c4e41b4cd500d7f1e39..9198b9f5f53520934ab37c9d91b95a1e0276bfb7 100644 --- a/patch/attiny84.yaml +++ b/patch/attiny84.yaml @@ -1,6 +1,7 @@ _include: - "common/ac.yaml" - "common/port.yaml" + - "common/tiny/usi.yaml" - "common/wdt.yaml" - "timer/attiny84.yaml" @@ -194,28 +195,3 @@ EXINT: TOGGLE: [1, "Any logical change on INTx generates an interrupt request"] FALLING: [2, "The falling edge of INTx generates an interrupt request"] RISING: [3, "The rising edge of INTx generates an interrupt request"] -USI: - _modify: - USISR: - access: read-write - USICR: - _modify: - USICLK: - access: write-only - USITC: - access: write-only - USIWM: - _replace_enum: - DISABLED: [0, "All detectors disabled. Port pins operates as normal."] - THREE_WIRE: [1, "Three-wire mode. Uses DO, DI, and USCK pins."] - TWO_WIRE_SLAVE: [2, "Two-wire mode (Slave). Uses SDA (DI) and SCL (USCK) pins."] - TWO_WIRE_MASTER: [3, "Two-wire mode (Master). Uses SDA and SCL pins."] - USICS: - NO_CLOCK: [0, "No Clock/Software clock strobe"] - TC0: [1, "Timer/Counter0 Compare Match"] - EXT_POS: [2, "External, positive edge"] - EXT_NEG: [3, "External, negative edge"] - USISR: - _modify: - USIDC: - access: read-only diff --git a/patch/attiny85.yaml b/patch/attiny85.yaml index 6d55416f3113e8ab42c5116fb40123fd635e81e0..1c9c43c6bb06416f3c3565197a5b7b69e39aff49 100644 --- a/patch/attiny85.yaml +++ b/patch/attiny85.yaml @@ -1,6 +1,7 @@ _include: - "common/ac.yaml" - "common/port.yaml" + - "common/tiny/usi.yaml" - "common/wdt.yaml" - "timer/attiny85.yaml" @@ -130,28 +131,3 @@ EXINT: TOGGLE: [1, "Any logical change on INTx generates an interrupt request"] FALLING: [2, "The falling edge of INTx generates an interrupt request"] RISING: [3, "The rising edge of INTx generates an interrupt request"] -USI: - _modify: - USISR: - access: read-write - USICR: - _modify: - USICLK: - access: write-only - USITC: - access: write-only - USIWM: - _replace_enum: - DISABLED: [0, "All detectors disabled. Port pins operates as normal."] - THREE_WIRE: [1, "Three-wire mode. Uses DO, DI, and USCK pins."] - TWO_WIRE_SLAVE: [2, "Two-wire mode (Slave). Uses SDA (DI) and SCL (USCK) pins."] - TWO_WIRE_MASTER: [3, "Two-wire mode (Master). Uses SDA and SCL pins."] - USICS: - NO_CLOCK: [0, "No Clock/Software clock strobe"] - TC0: [1, "Timer/Counter0 Compare Match"] - EXT_POS: [2, "External, positive edge"] - EXT_NEG: [3, "External, negative edge"] - USISR: - _modify: - USIDC: - access: read-only diff --git a/patch/common/tiny/usi.yaml b/patch/common/tiny/usi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a094171d95b106936105c6527301fdac231f6a95 --- /dev/null +++ b/patch/common/tiny/usi.yaml @@ -0,0 +1,25 @@ +USI: + _modify: + USISR: + access: read-write + USICR: + _modify: + USICLK: + access: write-only + USITC: + access: write-only + USIWM: + _replace_enum: + DISABLED: [0, "All detectors disabled. Port pins operates as normal."] + THREE_WIRE: [1, "Three-wire mode. Uses DO, DI, and USCK pins."] + TWO_WIRE_SLAVE: [2, "Two-wire mode (Slave). Uses SDA (DI) and SCL (USCK) pins."] + TWO_WIRE_MASTER: [3, "Two-wire mode (Master). Uses SDA and SCL pins."] + USICS: + NO_CLOCK: [0, "No Clock/Software clock strobe"] + TC0: [1, "Timer/Counter0 Compare Match"] + EXT_POS: [2, "External, positive edge"] + EXT_NEG: [3, "External, negative edge"] + USISR: + _modify: + USIDC: + access: read-only