From c0b5119ab1ad4d1b23b7a63fb9d297d82ee6ccf0 Mon Sep 17 00:00:00 2001
From: Andrew Dona-Couch <hi@andrewcou.ch>
Date: Wed, 5 Aug 2020 01:13:49 -0400
Subject: [PATCH] attiny85: Timer patch fixes

---
 patch/timer/attiny85.yaml                     |  4 +-
 patch/timer/dev/8bit-tiny85-tc0.yaml          | 45 +++++++++++++++++++
 .../{8bit-tiny.yaml => 8bit-tiny85-tc1.yaml}  | 22 +++++++++
 3 files changed, 69 insertions(+), 2 deletions(-)
 create mode 100644 patch/timer/dev/8bit-tiny85-tc0.yaml
 rename patch/timer/dev/{8bit-tiny.yaml => 8bit-tiny85-tc1.yaml} (69%)

diff --git a/patch/timer/attiny85.yaml b/patch/timer/attiny85.yaml
index bc42be5..00ceda1 100644
--- a/patch/timer/attiny85.yaml
+++ b/patch/timer/attiny85.yaml
@@ -9,8 +9,8 @@ _modify:
 
 TC0:
   _include:
-    - "dev/8bit.yaml"
+    - "dev/8bit-tiny85-tc0.yaml"
 
 TC1:
   _include:
-    - "dev/8bit-tiny.yaml"
+    - "dev/8bit-tiny85-tc1.yaml"
diff --git a/patch/timer/dev/8bit-tiny85-tc0.yaml b/patch/timer/dev/8bit-tiny85-tc0.yaml
new file mode 100644
index 0000000..7ea61d0
--- /dev/null
+++ b/patch/timer/dev/8bit-tiny85-tc0.yaml
@@ -0,0 +1,45 @@
+TCCR?A:
+  _modify:
+    COM?A:
+      description: "Compare Output A Mode"
+      _write_constraint: enum
+    COM?B:
+      description: "Compare Output B Mode"
+      _write_constraint: enum
+    WGM?:
+      _write_constraint: enum
+  COM??:
+    _replace_enum:
+      DISCONNECTED:  [0, "Normal port operation, OCix disconnected"]
+      MATCH_TOGGLE:  [1, "Toggle OCix on Compare Match (Might depend on WGM)"]
+      MATCH_CLEAR:   [2, "Clear OCix on Compare Match (If PWM is enabled, OCix is set at BOTTOM)"]
+      MATCH_SET:     [3, "Set OCix on Compare Match (If PWM is enabled, OCix is cleared at BOTTOM)"]
+  WGM?:
+    _replace_enum:
+      NORMAL_TOP:    [0, "Normal, Top: `0xff`, Update: *Immediate*, Flag: *MAX*"]
+      PWM_PHASE:     [1, "Phase Correct PWM, Top: `0xff`, Update: *TOP*, Flag: *BOTTOM*"]
+      CTC:           [2, "CTC, Top: *OCRA*, Update: *Immediate*, Flag: *MAX*"]
+      PWM_FAST:      [3, "Fast PWM, Top: `0xff`, Update: *BOTTOM*, Flag: *TOP*"]
+
+TCCR?B:
+  _modify:
+    WGM?2:
+      description: "Waveform Generation Mode High Bit (Enable Top: *OCRA* for `PWM` modes)"
+    FOC??:
+      access: write-only
+  CS?:
+    _replace_enum:
+      NO_CLOCK:      [0, "No clock source (Timer/Counter stopped)"]
+      DIRECT:        [1, "Running, No Prescaling"]
+      PRESCALE_8:    [2, "Running, CLK/8"]
+      PRESCALE_64:   [3, "Running, CLK/64"]
+      PRESCALE_256:  [4, "Running, CLK/256"]
+      PRESCALE_1024: [5, "Running, CLK/1024"]
+      EXT_FALLING:   [6, "Running, ExtClk Tx Falling Edge"]
+      EXT_RISING:    [7, "Running, ExtClk Tx Rising Edge"]
+
+_modify:
+  OCR0A:
+    description: "Output Compare Register A"
+  OCR0B:
+    description: "Output Compare Register B"
diff --git a/patch/timer/dev/8bit-tiny.yaml b/patch/timer/dev/8bit-tiny85-tc1.yaml
similarity index 69%
rename from patch/timer/dev/8bit-tiny.yaml
rename to patch/timer/dev/8bit-tiny85-tc1.yaml
index 5ab5d73..187a9c3 100644
--- a/patch/timer/dev/8bit-tiny.yaml
+++ b/patch/timer/dev/8bit-tiny85-tc1.yaml
@@ -26,7 +26,29 @@ TCCR?:
       PRESCALE_8192:  [14, "Running, CLK/8192"]
       PRESCALE_16384: [15, "Running, CLK/16384"]
 
+_modify:
+  DT1A:
+    description: "Dead Time Value Register A"
+  DT1B:
+    description: "Dead Time Value Register B"
+  OCR1A:
+    description: "Output Compare Register A"
+  OCR1B:
+    description: "Output Compare Register B"
+  OCR1C:
+    description: "Output Compare Register C"
+  TCNT?:
+    access: read-write
+
 GTCCR:
   _modify:
     FOC??:
       access: write-only
+
+DTPS:
+  DTPS:
+    _replace_enum:
+      DIRECT: [0, "No Prescaling"]
+      PRESCALE_2: [1, "Division factor 2"]
+      PRESCALE_4: [2, "Division factor 4"]
+      PRESCALE_8: [3, "Division factor 8"]
-- 
2.48.1