From 99029de7abac0afb33ec4f38ec3760a8a1483e4c Mon Sep 17 00:00:00 2001 From: Rahix Date: Wed, 29 Jul 2020 22:03:04 +0200 Subject: [PATCH] atmega32u4,atmega328p: Add patch for 16-bit timers Signed-off-by: Rahix --- patch/timer/atmega328p.yaml | 4 ++++ patch/timer/atmega32u4.yaml | 4 ++++ patch/timer/dev/16bit.yaml | 30 ++++++++++++++++++++++++++++++ 3 files changed, 38 insertions(+) create mode 100644 patch/timer/dev/16bit.yaml diff --git a/patch/timer/atmega328p.yaml b/patch/timer/atmega328p.yaml index 8697dd4..95e4c60 100644 --- a/patch/timer/atmega328p.yaml +++ b/patch/timer/atmega328p.yaml @@ -4,3 +4,7 @@ TC0: _include: - "dev/8bit.yaml" + +TC1: + _include: + - "dev/16bit.yaml" diff --git a/patch/timer/atmega32u4.yaml b/patch/timer/atmega32u4.yaml index 8697dd4..11cc96f 100644 --- a/patch/timer/atmega32u4.yaml +++ b/patch/timer/atmega32u4.yaml @@ -4,3 +4,7 @@ TC0: _include: - "dev/8bit.yaml" + +TC1,TC3: + _include: + - "dev/16bit.yaml" diff --git a/patch/timer/dev/16bit.yaml b/patch/timer/dev/16bit.yaml new file mode 100644 index 0000000..816303a --- /dev/null +++ b/patch/timer/dev/16bit.yaml @@ -0,0 +1,30 @@ +TCCR?A: + _modify: + COM??: + _write_constraint: enum + COM??: + _replace_enum: + DISCONNECTED: [0, "Normal port operation, OCix disconnected"] + MATCH_TOGGLE: [1, "Toggle OCix on Compare Match (Might depend on WGM)"] + MATCH_CLEAR: [2, "Clear OCix on Compare Match (If PWM is enabled, OCix is set at TOP)"] + MATCH_SET: [3, "Set OCix on Compare Match (If PWM is enabled, OCix is cleared at TOP)"] + +TCCR?B: + _modify: + CS?: + _write_constraint: enum + CS?: + _replace_enum: + NO_CLOCK: [0, "No clock source (Timer/Counter stopped)"] + DIRECT: [1, "Running, No Prescaling"] + PRESCALE_8: [2, "Running, CLK/8"] + PRESCALE_64: [3, "Running, CLK/64"] + PRESCALE_256: [4, "Running, CLK/256"] + PRESCALE_1024: [5, "Running, CLK/1024"] + EXT_FALLING: [6, "Running, ExtClk Tx Falling Edge"] + EXT_RISING: [7, "Running, ExtClk Tx Rising Edge"] + +TCCR?C: + _modify: + FOC??: + access: write-only -- 2.48.1